u-boot.git/drivers/net/phy/phy.c, branch v2014.04 Unnamed repository; edit this file 'description' to name the repository. phy: Use supported field during autonegotiation 2013-11-22T23:03:20+00:00 David Dueck davidcdueck@googlemail.com 2013-11-05T16:23:02+00:00 3a530d1b3e947c09e882dda8883aa608458a598c The current code incorrectly detects gigabit capabilities for some 100Mbit/s phys. (lan8720a) Signed-off-by: David Dueck <davidcdueck@googlemail.com> 
The current code incorrectly detects gigabit capabilities for some
100Mbit/s phys. (lan8720a)

Signed-off-by: David Dueck <davidcdueck@googlemail.com>
net, phy, cpsw: fix gigabit register access 2013-07-30T13:21:42+00:00 Heiko Schocher hs@denx.de 2013-07-23T13:32:36+00:00 f6d1f6e4a58edae4776937647381a43fea5e83a5 accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com> 
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24T13:44:38+00:00 Wolfgang Denk wd@denx.de 2013-07-08T07:37:19+00:00 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case 2013-07-19T21:12:20+00:00 Fabio Estevam fabio.estevam@freescale.com 2013-07-19T13:01:34+00:00 9a5dad239332537a5689131bbcc705c1f9c0cb41 Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> 
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
phy: fix 10/100Mbps operation on 1Gbps-capable links 2013-07-19T21:12:16+00:00 Sascha Silbe t-uboot@infra-silbe.de 2013-07-19T10:25:10+00:00 9ba30f6bc2741ae4d49724cdd32ca1c9a48f6155 de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> 
de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
add support for Xilinx 1000BASE-X phy (GTX) 2013-06-25T00:11:13+00:00 Charles Coldwell coldwell@gmail.com 2013-02-21T13:25:52+00:00 de1d786edf01035f60a87e1e0f917a4169dc6964 commit 39695029bc15041c809df3db4ba19bd729c447fa Author: Charles Coldwell <coldwell@ll.mit.edu> Date: Tue Feb 19 08:27:33 2013 -0500 Changes to support the Xilinx 1000BASE-X phy (GTX/MGT) Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu> 
commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
net: add ICPlus PHY driver 2013-06-25T00:07:32+00:00 Yegor Yefremov yegorslists@googlemail.com 2012-11-28T10:15:18+00:00 0fae25089d9e3303e952a4227bd2c1edccabfa20 The driver code was taken from Linux kernel source: drivers/net/phy/icplus.c Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> 
The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
phy: export genphy_parse_link() 2013-06-25T00:07:32+00:00 Yegor Yefremov yegorslists@googlemail.com 2012-11-28T10:15:17+00:00 e2043f5c272d14a0e0acd81382f17cfc883136d6 Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> 
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
phy: add support for ET1011C phys 2013-05-10T12:25:54+00:00 Matt Porter mporter@ti.com 2013-03-20T05:38:13+00:00 f485c8a35b38356a473208bec5ed786792c1eafe Adds an ET1011C PHY driver which is derived from the Linux kernel PHY driver (drivers/net/phy/et1011c.c) from the v3.9-rc2 tag. Note that an errata workaround config option is implemented to allow for TX_CLK to be enabled even when gigabit mode is negotiated. This workaround is used on the PG1.0 TI814X EVM. Signed-off-by: Matt Porter <mporter@ti.com> Reviewed-by: Tom Rini <trini@ti.com> 
Adds an ET1011C PHY driver which is derived from the
Linux kernel PHY driver (drivers/net/phy/et1011c.c)
from the v3.9-rc2 tag. Note that an errata workaround
config option is implemented to allow for TX_CLK to be
enabled even when gigabit mode is negotiated. This
workaround is used on the PG1.0 TI814X EVM.

Signed-off-by: Matt Porter <mporter@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
phy: add phy_find_by_mask/phy_connect_dev 2013-01-28T05:57:50+00:00 Troy Kisky troy.kisky@boundarydevices.com 2012-10-22T16:40:43+00:00 1adb406b014176f0c1a925e4d3e9aae556dfe571 It is useful to be able to try a range of possible phy addresses to connect. Also, an ethernet device is not required to use phy_find_by_mask leading to better separation of mii vs ethernet, as suggested by Andy Fleming. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> 
It is useful to be able to try a range of
possible phy addresses to connect.

Also, an ethernet device is not required
to use phy_find_by_mask leading to better
separation of mii vs ethernet, as suggested
by Andy Fleming.

Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>