u-boot.git/drivers/net/phy/phy.c, branch v2014.10

drivers: net: remove dead drivers

2014-08-21T16:01:11+00:00

The following configs are not defined at all:

 - CONFIG_INCA_IP_SWITCH
 - CONFIG_PBL2800_ETHER
 - CONFIG_PHY_ICPLUS

Signed-off-by: Masahiro Yamada

phy: fix create_phy_by_mask for when its given an actual search mask

2014-06-05T18:44:56+00:00

get_phy_id returns -EIO when it can't read from a phy at a given addr.  This would cause
create_phy_by_mask to return prematurely before it had tested the other addresses in the provided mask.

Example usage:
Replace
    phydev = phy_connect(bus, phy_addr, dev, phy_if)
with
    phydev = phy_find_by_mask(bus, phy_mask, phy_if)
    if (phydev)
	phy_connect_dev(phydev, dev);

Signed-off-by: Cormier, Jonathan 
Cc: Joe Hershberger

net/phy: enable get_phy_id redefinable

2014-05-12T19:19:45+00:00

As some PHYs have non-standard PHY ID registers, PHY Id can't
be read correctly by current get_phy_id function, so we enable
get_phy_id redefinable to permit specific PHY driver having own
specific get_phy_id function.

Signed-off-by: Shengzhou Liu

phy: Use supported field during autonegotiation

2013-11-22T23:03:20+00:00

The current code incorrectly detects gigabit capabilities for some
100Mbit/s phys. (lan8720a)

Signed-off-by: David Dueck

net, phy, cpsw: fix gigabit register access

2013-07-30T13:21:42+00:00

accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher 
Cc: Joe Hershberger 
Acked-by: Mugunthan V N 
Signed-off-by: Tom Rini

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38+00:00

Signed-off-by: Wolfgang Denk 
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini

net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case

2013-07-19T21:12:20+00:00

Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell 
Reviewed-By: Sascha Silbe 
Reviewed-by: Joe Hershberger 
Signed-off-by: Fabio Estevam

phy: fix 10/100Mbps operation on 1Gbps-capable links

2013-07-19T21:12:16+00:00

de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe 
Tested-by: Fabio Estevam 
Reviewed-by: Joe Hershberger

add support for Xilinx 1000BASE-X phy (GTX)

2013-06-25T00:11:13+00:00

commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell 
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell

net: add ICPlus PHY driver

2013-06-25T00:07:32+00:00

The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c

Signed-off-by: Yegor Yefremov