u-boot.git/drivers/net/phy/phy.c, branch v2020.04

net: phy: Fix overlong PHY timeout

2020-03-09T23:11:24+00:00

Commit 27c3f70f3b50 ("net: phy: Increase link up delay in
genphy_update_link()") increased the per-iteration waiting time from
1ms to 50ms, without adjusting the timeout counter. This lead to the
timeout increasing from the typical 4 seconds to over three minutes.

Adjust the timeout counter evaluation by that factor of 50 to bring the
timeout back to the intended value.

Signed-off-by: Andre Przywara 
Fixes: net: phy: Increase link up delay in genphy_update_link() ("27c3f70f3b50")
Reviewed-by: Stefan Roese 
Tested-by: Matthias Brugger 
Tested-by: Simon Goldschmidt 
Acked-by: Joe Hershberger

phy: Include NC-SI in phy setup

2020-03-09T23:11:23+00:00

Add NC-SI to the usual phy handling. This makes two notable changes:
- Somewhat similar to a fixed phy, phy_connect() will create an NC-SI
phy if CONFIG_PHY_NCSI is defined.
- An early return is added to phy_read() and phy_write() to handle a
case like the NC-SI phy which does not define a bus.

Signed-off-by: Samuel Mendoza-Jonas 
Reviewed-by: Joel Stanley 
Acked-by: Joe Hershberger

net: phy: Increase link up delay in genphy_update_link()

2019-12-09T15:47:42+00:00

I've noticed that in most cases when genphy_update_link() is called, the
ethernet driver (mt7628-eth in this case) fails with the first ethernet
packets. Resulting in a timeout of the first tftp command. Increasing
the delay in the link check look from 1 to 50 ms and moving it below the
BMSR register read fixes this issue, resulting in a stable ethernet
traffic, even after initial link autonogotiation.

Signed-off-by: Stefan Roese 
Cc: Weijie Gao 
Cc: Joe Hershberger 
Acked-by: Joe Hershberger

net/phy: Fix phy_connect() for phy addr 0

2019-12-09T15:47:42+00:00

Fix 'mask' calculation in phy_connect() for phy addr '0'.
'mask' is getting set to '0xffffffff' for phy addr '0'
in phy_connect() whereas expected value is '0'.

Signed-off-by: Priyanka Jain 
Reported-by: tetsu-aoki via github
Acked-by: Joe Hershberger

net: phy: Add gmiitorgmii converter support

2019-10-08T07:41:27+00:00

This patch adds support for gmiitorgmii converter.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY.
The ethernet driver probes this bridge and this bridge driver
probes real phy driver and invokes the real phy functionalities
as requested. This bridge just needs to be configured based on
real phy negotiated speed and duplex.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek

net: phy: Define init routine and register generic phy driver

2019-10-08T07:41:27+00:00

This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek

drivers: net: phy: Ignore PHY ID 0 during PHY probing

2019-07-18T21:37:13+00:00

Current code fails to probe some C45 PHYs that also respond to C22 reads.
This is the case for PHYs like Aquantia AQR112, Marvell 88X2242 (as
previously posted on the u-boot list).
If the PHY ID reads all 0s just ignore it and try the next devad.

Signed-off-by: Alex Marginean 
Reviewed-By: Ramon Fried 
Reviewed-by: Bin Meng 
Acked-by: Joe Hershberger

net: phy: Fix return value check phy_probe

2019-05-08T22:27:00+00:00

Don't ignore return value of phy_probe() call as
the probe may fail and it needs to be reported.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
Acked-by: Joe Hershberger

net: phy: Reloc next and prev pointers inside phy_drivers

2019-05-08T22:27:00+00:00

This patch relocates the pointers inside phy_drivers incase
of manual reloc. Without this reloc, these points to invalid
pre relocation address and hence causes exception or hang.

Signed-off-by: Siva Durga Prasad Paladugu 
Signed-off-by: Michal Simek 
Acked-by: Joe Hershberger

net: phy: Add generic helpers to access MMD PHY registers

2019-05-07T19:51:55+00:00

Two new helper functions (phy_read_mmd() and phy_write_mmd()) are added
to allow access to the MMD PHY registers.

The MMD PHY registers can be accessed by several means:

1. Using two new MMD access function hooks in the PHY driver. These
functions can be implemented when the PHY driver does not support the
standard IEEE Compatible clause 45 access mechanism described in clause
22 or if the PHY uses its own non-standard access mechanism.

2. Direct access for C45 PHYs and C22 PHYs when accessing the reachable
DEVADs.

3. The standard clause 45 access extensions to the MMD registers through
the indirection registers (clause 22) in all the other cases.

Signed-off-by: Carlo Caione 
Acked-by: Joe Hershberger