<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/net/phy/ti.c, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: phy: ti: rename ti.c to dp83867.c</title>
<updated>2019-12-09T15:47:42+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-11-18T21:04:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5ee989c5aa0c26c59fb7c60cb6d0d6cd33699996'/>
<id>5ee989c5aa0c26c59fb7c60cb6d0d6cd33699996</id>
<content type='text'>
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Fix clock output DT property</title>
<updated>2019-07-15T18:32:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@impinj.com</email>
</author>
<published>2019-05-10T17:49:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2529dea8931849c2bf8ee32963ee846e8e06e390'/>
<id>2529dea8931849c2bf8ee32963ee846e8e06e390</id>
<content type='text'>
The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work.  Move
it after the node pointer is set.

Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Trent Piepho &lt;tpiepho@impinj.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work.  Move
it after the node pointer is set.

Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Trent Piepho &lt;tpiepho@impinj.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Use default values for tx/rx delay and fifo size</title>
<updated>2019-07-15T18:32:25+00:00</updated>
<author>
<name>Trent Piepho</name>
<email>tpiepho@impinj.com</email>
</author>
<published>2019-05-09T19:41:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c2df9b49ce295ad8ecbeccb7f1d22c9d83e1c0cd'/>
<id>c2df9b49ce295ad8ecbeccb7f1d22c9d83e1c0cd</id>
<content type='text'>
When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver.  When using DM_ETH, they should come
from the device tree.  However, if the device tree does not have the
properties, the driver will silent use -1.  Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.

Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.

As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Trent Piepho &lt;tpiepho@impinj.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver.  When using DM_ETH, they should come
from the device tree.  However, if the device tree does not have the
properties, the driver will silent use -1.  Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.

Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.

As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Signed-off-by: Trent Piepho &lt;tpiepho@impinj.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: ti: Init node before reading</title>
<updated>2019-05-14T19:43:33+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2019-03-16T11:43:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6845b368f17e7bfb7f6d683cfd4e0faa75877145'/>
<id>6845b368f17e7bfb7f6d683cfd4e0faa75877145</id>
<content type='text'>
There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Reviewed-by: &lt;hannes.schmelzer@br-automation.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a need to fill node before clk_output_sel is setup.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
Reviewed-by: &lt;hannes.schmelzer@br-automation.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: use generic helpers to access MMD registers</title>
<updated>2019-05-07T19:51:55+00:00</updated>
<author>
<name>Carlo Caione</name>
<email>ccaione@baylibre.com</email>
</author>
<published>2019-02-08T17:25:07+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4c29dc1863e4f739ec2f496352935fd37c123553'/>
<id>4c29dc1863e4f739ec2f496352935fd37c123553</id>
<content type='text'>
Now that generic helpers are available, use those instead of relying on
ti specific functions.

Signed-off-by: Carlo Caione &lt;ccaione@baylibre.com&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now that generic helpers are available, use those instead of relying on
ti specific functions.

Signed-off-by: Carlo Caione &lt;ccaione@baylibre.com&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Add binding for the CLK_OUT pin muxing</title>
<updated>2018-10-10T17:28:54+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f347a0096ad0c1e56d1b18b7eb60731d40d49c2'/>
<id>0f347a0096ad0c1e56d1b18b7eb60731d40d49c2</id>
<content type='text'>
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Recover from "port mirroring" N/A MODE4</title>
<updated>2018-10-10T17:28:54+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=be71a74c59b7f34e83f3f6ea4b1a838de356c654'/>
<id>be71a74c59b7f34e83f3f6ea4b1a838de356c654</id>
<content type='text'>
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver</title>
<updated>2018-10-10T17:28:53+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fba725f41002e5035e601a7cfa9429b0c8184211'/>
<id>fba725f41002e5035e601a7cfa9429b0c8184211</id>
<content type='text'>
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: dp83867: switch to use phy_get_ofnode()</title>
<updated>2018-07-26T19:08:22+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-07-05T17:02:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8d7ec782f3b969d828831359411203adfc20dd0'/>
<id>b8d7ec782f3b969d828831359411203adfc20dd0</id>
<content type='text'>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: dp83867: switch to use ofnode api</title>
<updated>2018-07-26T19:08:21+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-06-28T19:26:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ab75cf76e78d2ce729896625504cdfff1d3d8a5'/>
<id>3ab75cf76e78d2ce729896625504cdfff1d3d8a5</id>
<content type='text'>
Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
