u-boot.git/drivers/net/phy, branch v2010.06

Coding Style cleanup; update CHANGELOG, prepare -rc1

2009-10-27T23:49:47+00:00

Signed-off-by: Wolfgang Denk

drivers/net/phy/miiphybb.c: fix warning: no newline at end of file

2009-10-27T19:58:24+00:00

Add missing newline.

Signed-off-by: Wolfgang Denk 
Cc: Luigi Mantellini 
Cc: Ben Warren

Rewrite the miiphybb (Bit-banged MII bus driver) in order to support an arbitrary number of mii buses.

2009-10-11T06:16:53+00:00

This feature is useful when your board uses different mii buses for different
phys and all (or a part) of these buses are implemented via bit-banging mode.

The driver requires that the following macros should be defined into the board
configuration file:

CONFIG_BITBANGMII       - Enable the miiphybb driver
CONFIG_BITBANGMII_MULTI - Enable the multi bus support

If the CONFIG_BITBANGMII_MULTI is not defined, the board's config file needs
to define at least the following macros:

MII_INIT      - Generic code to enable the MII bus (optional)
MDIO_DECLARE  - Declaration needed to access to the MDIO pin (optional)
MDIO_ACTIVE   - Activate the MDIO pin as out pin
MDIO_TRISTATE - Activate the MDIO pin as input/tristate pin
MDIO_READ     - Read the MDIO pin
MDIO(v)       - Write v on the MDIO pin
MDC_DECLARE   - Declaration needed to access to the MDC pin (optional)
MDC(v)        - Write v on the MDC pin

The previous macros make the driver compatible with the previous version
(that didn't support the multi-bus).

When the CONFIG_BITBANGMII_MULTI is also defined, the board code needs to fill
the bb_miiphy_buses[] array with a record for each required bus and declare
the bb_miiphy_buses_num variable with the number of mii buses.
The record (struct bb_miiphy_bus) has the following fields/callbacks (see
miiphy.h for details):

char name[]            - The symbolic name that must be equal to the MII bus
                         registered name
int (*init)()          - Initialization function called at startup time (just
                         before the Ethernet initialization)
int (*mdio_active)()   - Activate the MDIO pin as output
int (*mdio_tristate)() - Activate the MDIO pin as input/tristate pin
int (*set_mdio)()      - Write the MDIO pin
int (*get_mdio)()      - Read the MDIO pin
int (*set_mdc)()       - Write the MDC pin
int (*delay)()         - Delay function
void *priv             - Private data used by board specific code

The board code will look like:

struct bb_miiphy_bus bb_miiphy_buses[] = {
 { .name = miibus#1, .init = b1_init, .mdio_active = b1_mdio_active, ... },
 { .name = miibus#2, .init = b2_init, .mdio_active = b2_mdio_active, ... },
 ...
int bb_miiphy_buses_num = sizeof(bb_miiphy_buses) /
                          sizeof(bb_miiphy_buses[0]);

Signed-off-by: Luigi 'Comio' Mantellini 
Signed-off-by: Ben Warren

net: phy: mv88e61xx.c : fixed build warning

2009-10-05T05:30:46+00:00

following build warning was observed

mv88e61xx.c: In function ‘mv88e61xx_busychk’:
mv88e61xx.c:208: warning: dereferencing type-punned pointer will break strict-aliasing rules

This patch fixes the same
Patch tested for rd6281a board build

Signed-off-by: Prafulla Wadaskar 
Signed-off-by: Ben Warren

net: phy: bugfixes: mv88E61xx compiler warnings fixed

2009-08-10T21:53:52+00:00

1. mv88E61xx driver compiler warnings fixed
2. idstr if-else statements changed to switch() construct
   and added default case too.
   This fixed idstr may be uninitialized warning

Signed-off-by: Prafulla Wadaskar 
Signed-off-by: Ben Warren

net: phy: bugfixes: mv88E61xx multichip addressing support

2009-07-23T05:53:45+00:00

With these fixes, this driver works properly for multi chip
addressging mode

Bugfixes:
1. Build error fixed for function mv88e61xx_busychk_multic-fixed
2. PHY dev address error detection- fixed
3. wrong busy bit was refered in function mv88e61xx_busychk -fixed
4. invalid data read ptr was refered for RD_PHY in case of
	multichip addressing mode -fixed

The Multichip Address mode is tested with RD6281A board having
MV88E6165 switch on it

Signed-off-by: Prafulla Wadaskar 
Signed-off-by: Ben Warren

MIIPHYBB: Return 0xFFFF if the PHY is not asserting TA.

2009-07-23T05:53:44+00:00

This patch sets the returned value to 0xFFFF if the PHY does not exist
and does not assert Transfer Acknowledge. A NULL check for the value
pointer is also added for buffer overflow protection.

Without this patch 'mii info' will  show 'phantom' devices because the
value will be not be initialized and return with some random value.

Signed-off-by: Richard Retanubun 
Signed-off-by: Ben Warren

Marvell MV88E61XX Switch Driver support

2009-06-15T07:13:54+00:00

Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration

Note: This driver is supported and tested against
kirkwood egiga interface

Contributors:
Yotam Admon 
Michael Blostein 
Signed-off-by: Prafulla Wadaskar 
Signed-off-by: Ben Warren

rename CFG_ macros to CONFIG_SYS

2008-10-18T19:54:03+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

miiphyutil: Move conditional compilation to Makefile

2008-08-29T19:53:56+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD