u-boot.git/drivers/net/phy, branch v2013.07 Unnamed repository; edit this file 'description' to name the repository. net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case 2013-07-19T21:12:20+00:00 Fabio Estevam fabio.estevam@freescale.com 2013-07-19T13:01:34+00:00 9a5dad239332537a5689131bbcc705c1f9c0cb41 Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> 
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
phy: fix 10/100Mbps operation on 1Gbps-capable links 2013-07-19T21:12:16+00:00 Sascha Silbe t-uboot@infra-silbe.de 2013-07-19T10:25:10+00:00 9ba30f6bc2741ae4d49724cdd32ca1c9a48f6155 de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> 
de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
phylib: add atheros ar803x phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:00+00:00 433a2c5325b982b49b099e526d373d07d0cc5e97 add atheros ar803x phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
phylib: add natsemi dp83630 phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:09+00:00 96d0b9e100cbe724d70e0aba18ad566542cc3e2e add natsemi dp83630 phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
net: phy: supplement support for Micrel's KSZ9031 2013-06-25T00:11:16+00:00 SARTRE Leo lsartre@adeneo-embedded.com 2013-04-30T14:57:25+00:00 42a7cb50a96e95cdca26607727c6767876414ced Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> 
Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
phylib: Add Atheros AR8035 GETH PHY support 2013-06-25T00:11:14+00:00 Xie Xiaobo X.Xie@freescale.com 2013-04-10T08:23:39+00:00 6027384a69a7e671e810ae65b690dbfb25d5da81 Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> 
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
add support for Xilinx 1000BASE-X phy (GTX) 2013-06-25T00:11:13+00:00 Charles Coldwell coldwell@gmail.com 2013-02-21T13:25:52+00:00 de1d786edf01035f60a87e1e0f917a4169dc6964 commit 39695029bc15041c809df3db4ba19bd729c447fa Author: Charles Coldwell <coldwell@ll.mit.edu> Date: Tue Feb 19 08:27:33 2013 -0500 Changes to support the Xilinx 1000BASE-X phy (GTX/MGT) Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu> 
commit 39695029bc15041c809df3db4ba19bd729c447fa
Author: Charles Coldwell <coldwell@ll.mit.edu>
Date:   Tue Feb 19 08:27:33 2013 -0500

    Changes to support the Xilinx 1000BASE-X phy (GTX/MGT)

Signed-off-by: Charles Coldwell <coldwell@ll.mit.edu>
PHY: micrel.c: add support for KSZ9031 2013-06-25T00:11:13+00:00 David Andrey David.Andrey@netmodule.com 2013-02-06T21:18:37+00:00 62d7dba7be212f9834d4aa8f1920f484dec0075c Add support for Micrel PHY KSZ9031 in phylib, including small rework for KSZ9021 to avoid code duplication Signed-off-by: David Andrey <david.andrey@netmodule.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Joe Herschberger <joe.hershberger@gmail.com> Cc: Andy Fleming <afleming@freescale.com> Acked-by: Stefan Roese <sr@denx.de> 
Add support for Micrel PHY KSZ9031 in phylib,
including small rework for KSZ9021 to avoid
code duplication

Signed-off-by: David Andrey <david.andrey@netmodule.com>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Cc: Joe Herschberger <joe.hershberger@gmail.com>
Cc: Andy Fleming <afleming@freescale.com>
Acked-by: Stefan Roese <sr@denx.de>
NET: phy: add 88E1310 PHY initialization 2013-06-25T00:10:14+00:00 Sebastian Hesselbarth sebastian.hesselbarth@gmail.com 2012-12-04T08:31:59+00:00 aeceec0d0ee492d6d20d4b4b07f7d9b6c3b109be This adds PHY initialization for Marvell Alaska 88E1310 PHY. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 
This adds PHY initialization for Marvell Alaska 88E1310 PHY.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
net: add ICPlus PHY driver 2013-06-25T00:07:32+00:00 Yegor Yefremov yegorslists@googlemail.com 2012-11-28T10:15:18+00:00 0fae25089d9e3303e952a4227bd2c1edccabfa20 The driver code was taken from Linux kernel source: drivers/net/phy/icplus.c Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com> 
The driver code was taken from Linux kernel source:
drivers/net/phy/icplus.c

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>