u-boot.git/drivers/net/phy, branch v2013.10 Unnamed repository; edit this file 'description' to name the repository. Cosmetic: Fix a number of typos, no functional changes. 2013-09-20T14:30:54+00:00 Robert P. J. Day rpjday@crashcourse.ca 2013-09-16T11:15:45+00:00 1bce2aeb6f31043caa0509387d85b786c1d2e147 Fix various misspellings of things like "environment", "kernel", "default" and "volatile", and throw in a couple grammar fixes. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> 
Fix various misspellings of things like "environment", "kernel",
"default" and "volatile", and throw in a couple grammar fixes.

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
net: phy/realtek: Add support for RTL8211DN and RTL8211E phy modules 2013-08-19T17:34:19+00:00 Bhupesh Sharma bhupesh.sharma@freescale.com 2013-07-18T08:28:20+00:00 c624d168bf87e5558a58e99c58b162f5e5b6368e This patch adds support for Realtek PHY modules RTL8211DN and RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG), which can be found on Freescale's T1040RDB boards. To make the driver more generic across 8211 family, a generic name 8211x is added for macros and function names. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Acked-by: York Sun <yorksun@freescale.com> 
This patch adds support for Realtek PHY modules RTL8211DN and
RTL8211E (variants: RTL8211E-VB-CG, RTL8211E-VL-CG, RTL8211EG-VB-CG),
which can be found on Freescale's T1040RDB boards.

To make the driver more generic across 8211 family, a generic name 8211x
is added for macros and function names.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
phy: smsc: LAN8710/8720 are not Gbit PHYs 2013-08-19T17:34:18+00:00 Fabio Estevam fabio.estevam@freescale.com 2013-06-07T00:04:19+00:00 25634210af785e36cf73a5e9a103c8cac5d84a26 LAN8710/8720 are 10/100 Mbps PHYs, so fix the '.features' field. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> 
LAN8710/8720 are 10/100 Mbps PHYs, so fix the '.features' field.

Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
net, phy, cpsw: fix gigabit register access 2013-07-30T13:21:42+00:00 Heiko Schocher hs@denx.de 2013-07-23T13:32:36+00:00 f6d1f6e4a58edae4776937647381a43fea5e83a5 accessing a lan9303 switch with the cpsw driver results in wrong speed detection, as the switch sets the BMSR_ERCAP in BMSR register, and follow read of the MII_STAT1000 register fails, as the switch does not support it. Current code did not check, if a phy_read() fails ... fix this. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Joe Hershberger <joe.hershberger@gmail.com> Acked-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tom Rini <trini@ti.com> 
accessing a lan9303 switch with the cpsw driver results in wrong
speed detection, as the switch sets the BMSR_ERCAP in BMSR
register, and follow read of the MII_STAT1000 register fails, as
the switch does not support it. Current code did not check,
if a phy_read() fails ... fix this.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Add GPL-2.0+ SPDX-License-Identifier to source files 2013-07-24T13:44:38+00:00 Wolfgang Denk wd@denx.de 2013-07-08T07:37:19+00:00 1a4596601fd395f3afb8f82f3f840c5e00bdd57a Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> 
Signed-off-by: Wolfgang Denk <wd@denx.de>
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini <trini@ti.com>
net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case 2013-07-19T21:12:20+00:00 Fabio Estevam fabio.estevam@freescale.com 2013-07-19T13:01:34+00:00 9a5dad239332537a5689131bbcc705c1f9c0cb41 Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the checking for ESTATUS_1000_XHALF, but it incorrectly sets the SUPPORTED_1000baseX_Full flag in this case. Set the SUPPORTED_1000baseX_Half flag instead. Acked-by: Charles Coldwell <coldwell@gmail.com> Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> 
Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell <coldwell@gmail.com>
Reviewed-By: Sascha Silbe <t-uboot@infra-silbe.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
phy: fix 10/100Mbps operation on 1Gbps-capable links 2013-07-19T21:12:16+00:00 Sascha Silbe t-uboot@infra-silbe.de 2013-07-19T10:25:10+00:00 9ba30f6bc2741ae4d49724cdd32ca1c9a48f6155 de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a check for the extended status register in order to support 1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since Extended Status only indicates what the PHY (i.e. the local side) is capable of, this broke communication with non-1Gbps peers. Only check the extended status if the 1000BASE-T registers are actually missing so we don't end up setting speed to 1Gbps even though the previous test (for the combination of local and peer support for 1Gbps) already indicated we can't do 1Gbps with the current peer. Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> 
de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
phylib: add atheros ar803x phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:00+00:00 433a2c5325b982b49b099e526d373d07d0cc5e97 add atheros ar803x phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
phylib: add natsemi dp83630 phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:09+00:00 96d0b9e100cbe724d70e0aba18ad566542cc3e2e add natsemi dp83630 phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
net: phy: supplement support for Micrel's KSZ9031 2013-06-25T00:11:16+00:00 SARTRE Leo lsartre@adeneo-embedded.com 2013-04-30T14:57:25+00:00 42a7cb50a96e95cdca26607727c6767876414ced Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> 
Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>