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<title>u-boot.git/drivers/net/phy, branch v2015.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: phy: Add support for all targets which requires MANUAL_RELOC</title>
<updated>2015-05-19T18:33:21+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2015-05-13T11:40:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=abbfcbe58eefc1accda5dd120fcfe58d244b63dd'/>
<id>abbfcbe58eefc1accda5dd120fcfe58d244b63dd</id>
<content type='text'>
Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA
relocation (mostly only GOT) where functions aray are not
updated. This patch is fixing function pointers passed to phy_register
function.
This patch was tested on Microblaze architecture.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
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<pre>
Targets with CONFIG_NEEDS_MANUAL_RELOC do not use REL/RELA
relocation (mostly only GOT) where functions aray are not
updated. This patch is fixing function pointers passed to phy_register
function.
This patch was tested on Microblaze architecture.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy: refactor RTL8211F initialization</title>
<updated>2015-05-19T18:33:21+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2015-04-24T08:57:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=793ea947703899c36a51c30e477466c49a8e9657'/>
<id>793ea947703899c36a51c30e477466c49a8e9657</id>
<content type='text'>
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
cc: Joe Hershberger &lt;joe.hershberger@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
RTL8211F needs to enalbe TXDLY for RGMII during
phy initialization, so move it to rtl8211f_config
for early initialization.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
cc: Joe Hershberger &lt;joe.hershberger@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy: Add support for realtek RTL8211F</title>
<updated>2015-05-19T18:33:20+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2015-03-12T10:54:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3d6af748ebd831524cb22a29433e9092af469ec7'/>
<id>3d6af748ebd831524cb22a29433e9092af469ec7</id>
<content type='text'>
RTL8211F has different registers from RTL8211E.
This patch adds support for RTL8211F PHY which
can be found on Freescale's T1023 RDB board.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
RTL8211F has different registers from RTL8211E.
This patch adds support for RTL8211F PHY which
can be found on Freescale's T1023 RDB board.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy/cortina: Fix compilation warning</title>
<updated>2015-04-23T15:55:57+00:00</updated>
<author>
<name>pankaj chauhan</name>
<email>pankaj.chauhan@freescale.com</email>
</author>
<published>2015-03-21T02:28:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8bb065630f14076c21351d46dbb9eb81c79bf0a4'/>
<id>8bb065630f14076c21351d46dbb9eb81c79bf0a4</id>
<content type='text'>
Fix comilation warning which is emitted when
firmware address is more than 32 bit.

Signed-off-by: pankaj chauhan &lt;pankaj.chauhan@freescale.com&gt;
Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
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<pre>
Fix comilation warning which is emitted when
firmware address is more than 32 bit.

Signed-off-by: pankaj chauhan &lt;pankaj.chauhan@freescale.com&gt;
Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy: fixup for get_phy_id</title>
<updated>2015-04-20T22:57:13+00:00</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2015-04-07T10:46:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5707d5ffd42a45088f433a2514d1320a6491697b'/>
<id>5707d5ffd42a45088f433a2514d1320a6491697b</id>
<content type='text'>
commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused
some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the
warning and make those special PHYs working as well.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
</content>
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<pre>
commit 3c6928fd7b0f84 "net: phy: fix warnings with W=1" caused
some PHYs(e.g. CS4315/CS4340) not working. This patch fixes the
warning and make those special PHYs working as well.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: micrel: add support for KSZ8081MNX</title>
<updated>2015-04-20T22:57:12+00:00</updated>
<author>
<name>Luca Ellero</name>
<email>luca.ellero@brickedbrain.com</email>
</author>
<published>2015-03-24T10:32:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c6a40f6e518c4fb900ec6a46a7fc1d1d354beb3a'/>
<id>c6a40f6e518c4fb900ec6a46a7fc1d1d354beb3a</id>
<content type='text'>
This patch adds a support for KSZ8081MNX in MII mode.

Signed-off-by: Luca Ellero &lt;luca.ellero@brickedbrain.com&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
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<pre>
This patch adds a support for KSZ8081MNX in MII mode.

Signed-off-by: Luca Ellero &lt;luca.ellero@brickedbrain.com&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: realtek: Disable interrupt on Realtek Ethernet PHY drivers</title>
<updated>2015-04-20T22:57:11+00:00</updated>
<author>
<name>Codrin Ciubotariu</name>
<email>codrin.ciubotariu@freescale.com</email>
</author>
<published>2015-02-13T12:47:58+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3cee1388927015fc96edcd6e3ed707cb3a5fa26b'/>
<id>3cee1388927015fc96edcd6e3ed707cb3a5fa26b</id>
<content type='text'>
Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have
interrupts enabled by default. If the interrupt is not treated later by
the OS and the PHY's interrupt line is enabled and shared with other
interrupts, the system will get an interrupt storm. This patch disables
the interrupt for PHY devices that use one of the current Realtek
Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L)
have the interrupt masked. In this case, the functionality of the PHY
should not be afected since this patch brings INER and INSR registers to
their default values.

Signed-off-by: Codrin Ciubotariu &lt;codrin.ciubotariu@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
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<pre>
Some Realtek Ethernet PHYs, like RTL8211D(G/N) and RTL8211E(G), have
interrupts enabled by default. If the interrupt is not treated later by
the OS and the PHY's interrupt line is enabled and shared with other
interrupts, the system will get an interrupt storm. This patch disables
the interrupt for PHY devices that use one of the current Realtek
Ethernet PHY drivers. Some of Realtek Ethernet PHYs, such as RTL8211B(L)
have the interrupt masked. In this case, the functionality of the PHY
should not be afected since this patch brings INER and INSR registers to
their default values.

Signed-off-by: Codrin Ciubotariu &lt;codrin.ciubotariu@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: net: Adjust PHY interface to work with CONFIG_DM_ETH</title>
<updated>2015-04-18T17:11:36+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-04-05T22:07:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c74c8e6651e760c6b0a25aa229b9adde706a547b'/>
<id>c74c8e6651e760c6b0a25aa229b9adde706a547b</id>
<content type='text'>
When driver model is used for Ethernet a few functions are passed a udevice
instead of an eth_device. Also add a function to find a PHY type given its
name. This will be used to decode the device tree node.

Finally, put a phy_interface field in struct eth_pdata since this is an
important part of the platform data for Ethernet.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
When driver model is used for Ethernet a few functions are passed a udevice
instead of an eth_device. Also add a function to find a PHY type given its
name. This will be used to decode the device tree node.

Finally, put a phy_interface field in struct eth_pdata since this is an
important part of the platform data for Ethernet.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: micrel: add support for KSZ8895 switch in SMI mode</title>
<updated>2015-01-30T21:55:00+00:00</updated>
<author>
<name>Philippe De Muyter</name>
<email>phdm@macqel.be</email>
</author>
<published>2014-02-19T16:21:59+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b7a5b0843812b7bd4a225951ce11e7d14398395c'/>
<id>b7a5b0843812b7bd4a225951ce11e7d14398395c</id>
<content type='text'>
This patch adds a phy driver for the Micrel KSZ8895 switch.  As the SoC MAC
is directly connected to the switch MAC the link to the switch is always up.

But the KSZ8895 switch can be hardwired in three configuration modes :
- not configurable with eventually an eeprom-stored configuration
- configurable by the mdio/mdc connection (SMI protocol)
- configurable by a SPI connection.

In not configurable mode, the switch starts automatically, but in the
other modes, it must be started programmatically, by writing 1 in
configuration register 1.
We only support the not configurable and mdio/mdc (aka SMI) modes here.

Signed-off-by: Philippe De Muyter &lt;phdm@macqel.be&gt;
Cc: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
This patch adds a phy driver for the Micrel KSZ8895 switch.  As the SoC MAC
is directly connected to the switch MAC the link to the switch is always up.

But the KSZ8895 switch can be hardwired in three configuration modes :
- not configurable with eventually an eeprom-stored configuration
- configurable by the mdio/mdc connection (SMI protocol)
- configurable by a SPI connection.

In not configurable mode, the switch starts automatically, but in the
other modes, it must be started programmatically, by writing 1 in
configuration register 1.
We only support the not configurable and mdio/mdc (aka SMI) modes here.

Signed-off-by: Philippe De Muyter &lt;phdm@macqel.be&gt;
Cc: Christian Gmeiner &lt;christian.gmeiner@gmail.com&gt;
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phylib: add support for aquantia PHYs</title>
<updated>2015-01-16T17:32:11+00:00</updated>
<author>
<name>Shaohui Xie</name>
<email>Shaohui.Xie@freescale.com</email>
</author>
<published>2014-12-30T10:32:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f7c38cf827a0cf9d5ab4ca60131dffa10a2e4309'/>
<id>f7c38cf827a0cf9d5ab4ca60131dffa10a2e4309</id>
<content type='text'>
This patch supports AQ1202, AQ2104, AQR105 PHY.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
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<pre>
This patch supports AQ1202, AQ2104, AQR105 PHY.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
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