u-boot.git/drivers/net/phy, branch v2016.11

net: phy: micrel: center FLP burst timing at 16ms

2016-11-07T17:28:16+00:00

Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.

For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.

[1] https://patchwork.kernel.org/patch/6558371/

Signed-off-by: Ash Charles 
Acked-by: Joe Hershberger

net: mv88e61xx: Add support for fixed links

2016-10-13T17:25:18+00:00

On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.

Signed-off-by: Chris Packham 
Acked-by: Joe Hershberger

net: Add support for mv88e609x switches

2016-10-13T17:25:14+00:00

The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.

The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().

Other than that it's just a matter of adding the appropriate chip
IDs.

Signed-off-by: Chris Packham 
Cc: Joshua Scott 
Acked-by: Joe Hershberger

drivers: net: phy: atheros: add separate config for AR8031

2016-10-13T17:24:55+00:00

In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.

Reviewed-by: Sekhar Nori 
Signed-off-by: Mugunthan V N 
Acked-by: Joe Hershberger

phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID

2016-10-13T17:24:51+00:00

This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello 
Reviewed-by: Marek Vasut 
Acked-by: Marek Vasut 
Acked-by: Joe Hershberger

treewide: replace #include with

2016-09-23T21:55:42+00:00

Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have
the same content.  (both just wrap )

Replace all include directives for  with .

Signed-off-by: Masahiro Yamada 
[trini: Fixup include/clk.]
Signed-off-by: Tom Rini

net: mii: Changes not made by spatch

2016-08-15T20:29:03+00:00

If the functions passed to the registration function are not in the same
C file (extern) then spatch will not handle the dependent changes.

Make those changes manually.

Signed-off-by: Joe Hershberger 

For the 4xx related files:
Acked-by: Stefan Roese 
Reviewed-by: Bin Meng

net: phy: marvell: Add a missing errno.h header

2016-07-27T20:15:54+00:00

This corrects a build error on zynqmp.

Signed-off-by: Simon Glass

driver: net: phylib: add support for aquantia AQR106/107 PHY

2016-07-06T15:45:04+00:00

This patch adds support for aquantia AQR106/107 PHY.

Signed-off-by: Mingkai Hu 
Signed-off-by: Gong Qianyu 
Acked-by: Joe Hershberger

net: phy: marvell: Do not reset 88e1310 after autoneg

2016-06-21T22:01:52+00:00

Commit a058052c "net: phy: do not read configuration register on reset",
changes the behaviour of the phy_reset function such that the state of
the BMCR register is not preserved during reset.

Change the config function for the m88e1310 so that it does not do a
reset after configuring auto-negotiation.

Signed-off-by: Nathan Rossi 
Cc: Joe Hershberger 
Cc: Michal Simek 
Cc: Stefan Roese 
Acked-by: Michal Simek 
Acked-by: Joe Hershberger 
Reviewed-by: Stefan Roese