u-boot.git/drivers/net/phy, branch v2017.03-rc1

net: phy: add SMSC LAN8742 phy

2017-01-28T19:04:47Z

This patch adds support for SMSC LAN8742 in phylib Signed-off-by: Michael Kurz Acked-by: Joe Hershberger

xilinx_phy: Pass correct pointer to fdtdec_get_int()

2017-01-11T06:00:27Z

This patch fixes incorrect pointer on offset device in device tree blob. When using with the component "Ethernet 1G/2.5G BASE-X PCS/PMA or SGMII" it does not understand what type is XAE_PHY_TYPE_1000BASE_X and trying to change frequency. Signed-off-by: Kamensky Ivan Signed-off-by: Michal Simek Acked-by: Joe Hershberger

net/phy/vitesse: Rework RGMII skew configuration for VSC8601

2016-12-08T16:36:22Z

The VSC8601 config tried to add an RGMII skew based on #defines that no config defines. That's quite an ugly way to do it. Since the skew is only needed on RGMII interfaces, check the interface mode at runtime, and apply the settings accordingly. Tested on custom board with AM3352 SOC and VSC801 PHY. Signed-off-by: Alexandru Gagniuc Acked-by: Joe Hershberger

net: phy: realtek: Only force master mode on rtl8211b/c

2016-12-08T16:36:22Z

Commit 525d187af ("net: phy: Optionally force master mode for RTL PHY") added the define to force the PHY into master mode. Unfortunatly this is an all or nothing switch. So it applies to either all PHY's or no PHY's. The bug that define tried to solve was a buggy PLL in the RTL8211C only. The Olimex OLinuXino Lime2 has gotten an upgrade where the PHY was replaced with an RTL8211E. With this define however, both lime2 boards are either forced to master mode or not. We could of course have a binary for each board, but the following patch fixes this by adding a 'quirk' to the flags to the rtl8211b and rtl8211c only. It is now possible to force master mode, but only have it apply to the rtl8211b and rtl8211c. Signed-off-by: Olliver Schinagl Acked-by: Joe Hershberger

net: phy: realtek: make define more consistent

2016-12-08T16:36:22Z

All internal defines in the realtek phy are with a small X, except MIIM_RTL8211X_CTRL1000T_MASTER. Make this more consistent Signed-off-by: Olliver Schinagl Acked-by: Joe Hershberger

net: phy: realtek: Use the BIT() macro

2016-12-08T16:36:21Z

The BIT macro is the preferred method to set bits. This patch adds the bit macro and converts bit invocations. Signed-off-by: Olliver Schinagl Acked-by: Joe Hershberger

net: phy: micrel: Fix error handling

2016-12-08T16:36:21Z

Fix the following error, the $ret variable handling must be part of the loop, while due to the missing parenthesis it was not. drivers/net/phy/micrel.c: In function ‘ksz9021_of_config’: drivers/net/phy/micrel.c:303:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation] for (i = 0; i < ARRAY_SIZE(ofcfg); i++) ^~~ drivers/net/phy/micrel.c:305:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’ if (ret) ^~ drivers/net/phy/micrel.c: In function ‘ksz9031_of_config’: drivers/net/phy/micrel.c:411:2: warning: this ‘for’ clause does not guard... [-Wmisleading-indentation] for (i = 0; i < ARRAY_SIZE(ofcfg); i++) ^~~ drivers/net/phy/micrel.c:413:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘for’ if (ret) ^~ Signed-off-by: Marek Vasut Cc: Joe Hershberger Acked-by: Joe Hershberger

net: phy: micrel: center FLP burst timing at 16ms

2016-11-07T17:28:16Z

Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms specified by the IEEE802.3 standard from the chip's default of 8ms. For more details, see the "Auto-Negotiation Timing" section of the KSZ9031RNX datasheet. [1] https://patchwork.kernel.org/patch/6558371/ Signed-off-by: Ash Charles Acked-by: Joe Hershberger

net: mv88e61xx: Add support for fixed links

2016-10-13T17:25:18Z

On some boards these switches are wired directly into a SERDES interface on another Ethernet MAC. Add the ability to specify these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines a bit mask of these fixed ports. Signed-off-by: Chris Packham Acked-by: Joe Hershberger

net: Add support for mv88e609x switches

2016-10-13T17:25:14Z

The Marvell Link Street mv88e60xx is a series of FastEthernet switch chips, some of which also support Gigabit ports. It is similar to the mv88e61xx series which support Gigabit on all ports. The main difference is the number of ports. Which affects the PORT_COUNT define and the size of the mask passed to mv88e61xx_port_set_vlan(). Other than that it's just a matter of adding the appropriate chip IDs. Signed-off-by: Chris Packham Cc: Joshua Scott Acked-by: Joe Hershberger