u-boot.git/drivers/net/phy, branch v2018.03-rc2

Kconfig: net: phylib: Phylib should depends on NET

2018-02-08T17:48:10+00:00

There is no value to enable phylib without networking support.

Signed-off-by: Michal Simek 
Acked-by: Joe Hershberger

phy: atheros: set auto-negotiation for AR8021

2018-01-15T18:05:27+00:00

Signed-off-by: Zhao Qiang 
Acked-by: Joe Hershberger

net: phy: b53: Add b53_reg read/write commands

2018-01-15T18:05:22+00:00

Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.

Reviewed-by: Stefan Roese 
Acked-by: Joe Hershberger 
Signed-off-by: Florian Fainelli

net: phy: Add Broadcom BCM53xx switch driver

2018-01-15T18:05:21+00:00

Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.

This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.

Reviewed-by: Stefan Roese 
Signed-off-by: Florian Fainelli

net: miiphybb: fix casting error

2018-01-15T18:05:17+00:00

Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.

Fixes: dfcc496ed7e2 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt 
Acked-by: Nobuhiro Iwamatsu 
Acked-by: Joe Hershberger

net: phy: marvell: Add functions to read PHY's extended registers

2018-01-15T18:05:16+00:00

This commit allows extended Marvell registers to be read with:

foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011

The above code changes the way ETH connector LEDs blink.

Signed-off-by: Lukasz Majewski 
Reviewed-by: York Sun 
Acked-by: Joe Hershberger

net: phy: meson-gxl: detect LPA corruption

2017-12-18T18:06:30+00:00

This patch is ported from the Linux patch posted at [1] and applied to
net tree as commit f1e2400a80ff.

The purpose of this change is to fix the incorrect detection of the link
partner (LP) advertised capabilities which sometimes happens with this PHY
(roughly 1 time in a dozen)

This issue may cause the link to be negotiated at 10Mbps/Full or
10Mbps/Half when 100MBps/Full is actually possible. In some case, the link
is even completely broken and no communication is possible.

To detect the corruption, we must look for a magic undocumented bit in the
WOL bank (hint given by the SoC vendor kernel) but this is not enough to
cover all cases. We also have to look at the LPA ack. If the LP supports
Aneg but did not ack our base code when aneg is completed, we assume
something went wrong.

The detection of a corrupted LPA triggers a restart of the aneg process.
This solves the problem but may take up to 6 retries to complete.

[1] https://lkml.kernel.org/r/20171208110811.30789-1-jbrunet@baylibre.com

Fixes: 8995a96d1d67 ("net: phy: Add Amlogic Meson GXL Internal PHY support")
Signed-off-by: Jerome Brunet 
Signed-off-by: Neil Armstrong

net: phy: Add Amlogic Meson GXL Internal PHY support

2017-11-17T12:44:13+00:00

The Amlogic Meson GXL/GXM families embeds an internal RMII Ethernet PHY.

The PHY acts as a generic PHY but needs a slight configuration right
before it's configuration.

Signed-off-by: Neil Armstrong

net: phy: micrel: Convert to livetree

2017-09-18T18:40:34+00:00

Update the Micrel KSZ90x1 driver for a live tree.

Signed-off-by: Philipp Tomsich 
Acked-by: Joe Hershberger 
Reviewed-by: Simon Glass

blk: Remove various places that do flush cache after read

2017-09-15T12:05:10+00:00

All these places seem to inherit the codes from the MMC driver where
a FIXME was put in the comment. However the correct operation after
read should be cache invalidate, not flush.

The underlying drivers should be responsible for the cache operation.
Remove these codes completely.

Signed-off-by: Bin Meng 
Reviewed-by: Stefan Roese 
Reviewed-by: York Sun 
Reviewed-by: Joe Hershberger 
Reviewed-by: Simon Glass 
Tested-by: York Sun