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<title>u-boot.git/drivers/net/phy, branch v2018.05-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: phy: Don't limit phy addresses by default</title>
<updated>2018-04-13T20:56:47+00:00</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2018-03-30T16:52:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=16879cd25a4089cde2f3393fb09567df53402679'/>
<id>16879cd25a4089cde2f3393fb09567df53402679</id>
<content type='text'>
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</content>
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<pre>
Some boards expect to find more than one phy while other boards are old
and need to be limited to a specific phy address. Only limit the phy
address for boards that opt in.

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Reviewed-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: xilinx_phy: Read phytype using property xlnx,phy-type</title>
<updated>2018-04-09T10:14:51+00:00</updated>
<author>
<name>Siva Durga Prasad Paladugu</name>
<email>siva.durga.paladugu@xilinx.com</email>
</author>
<published>2018-01-12T07:14:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c643c491b952d40d46224e788847b9f59ddcec04'/>
<id>c643c491b952d40d46224e788847b9f59ddcec04</id>
<content type='text'>
This patch reads phytype from property "xlnx,phy-type" instead
od simply looking for "phy-type". This is to be inline with
Linux and also fixes the issue of detecting it wrongly in
u-boot.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
This patch reads phytype from property "xlnx,phy-type" instead
od simply looking for "phy-type". This is to be inline with
Linux and also fixes the issue of detecting it wrongly in
u-boot.

Signed-off-by: Siva Durga Prasad Paladugu &lt;sivadur@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy/cortina: Add No firmware upload option</title>
<updated>2018-03-22T20:05:31+00:00</updated>
<author>
<name>Priyanka Jain</name>
<email>priyanka.jain@nxp.com</email>
</author>
<published>2018-01-30T06:41:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b321c44ac9e2569fcc07def3e150fcfe4554a1b0'/>
<id>b321c44ac9e2569fcc07def3e150fcfe4554a1b0</id>
<content type='text'>
Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Current Cortina phy driver assumes that firmware upload
is required during initialization and is dependent
on presence of corresponding macros like CONFIG_CORTINA_FW_ADDR
for compilation.

But Cortina phy has provision to store phy firmware in
attached dedicated EEPROM. And boards designed with such
EEPROM does not require firmware upload.

Add CORTINA_NO_FW_UPLOAD option in cortina.c to support
such boards.

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net/phy/cortina.c: Update get_phy_id implementation</title>
<updated>2018-03-22T20:05:31+00:00</updated>
<author>
<name>Priyanka Jain</name>
<email>priyanka.jain@nxp.com</email>
</author>
<published>2018-01-30T06:08:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=af5484acb0e8e4b6d0d977f84d8dde7b537c441d'/>
<id>af5484acb0e8e4b6d0d977f84d8dde7b537c441d</id>
<content type='text'>
Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.

This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different  bus.

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update get_phy_id() implementation in cortina.c to check
for Cortina_phy by comparing device phy_id with cortina phy_id
instead of relying on presence of CORTINA macros.

This will allow get_phy_id to work with non-cortina phy devices
which might have same phy address as Cortina device but on
different  bus.

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: phy: Fix aquantia compilation with DM</title>
<updated>2018-03-22T20:05:28+00:00</updated>
<author>
<name>Calvin Johnson</name>
<email>calvin.johnson@nxp.com</email>
</author>
<published>2018-03-08T10:00:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=365108ef52db8adce703559ff050475fd459c7d5'/>
<id>365108ef52db8adce703559ff050475fd459c7d5</id>
<content type='text'>
With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.

drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
          phydev-&gt;dev-&gt;name);
		     ^~

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
With CONFIG_DM_ETH enabled, aquantia driver compilation fails with
below error. This patch fixes the issue by including dm.h.

drivers/net/phy/aquantia.c: In function ‘aquantia_startup’:
drivers/net/phy/aquantia.c:73:21: error: dereferencing pointer to
incomplete
type ‘struct udevice’
          phydev-&gt;dev-&gt;name);
		     ^~

Signed-off-by: Calvin Johnson &lt;calvin.johnson@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys</title>
<updated>2018-03-22T20:05:27+00:00</updated>
<author>
<name>kevans@FreeBSD.org</name>
<email>kevans@FreeBSD.org</email>
</author>
<published>2018-02-14T23:02:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=66526e70381dbaad58533cfbd7bce07c668205c6'/>
<id>66526e70381dbaad58533cfbd7bce07c668205c6</id>
<content type='text'>
Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.

Signed-off-by: Kyle Evans &lt;kevans@FreeBSD.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off
on the PHY, as well as flipping some magical undocumented bits. The
magic number comes from the Pine64 engineering team, presumably as a
proxy from Realtek. This configuration fixes the throughput on some
Pine64 models. Packet loss of up to 60-70% has been observed without
this.

Signed-off-by: Kyle Evans &lt;kevans@FreeBSD.org&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Move CONFIG_PHY_ADDR to Kconfig</title>
<updated>2018-03-13T17:06:33+00:00</updated>
<author>
<name>Stefan Mavrodiev</name>
<email>stefan@olimex.com</email>
</author>
<published>2018-02-02T13:53:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b30c4190407be9807f6b5fdcfd3a3d983a961dee'/>
<id>b30c4190407be9807f6b5fdcfd3a3d983a961dee</id>
<content type='text'>
CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev &lt;stefan@olimex.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
[jagan: rebased on master]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
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<pre>
CONFIG_PHY_ADDR is used for old-style configuration. This makes
impossible changing the PHY address, if multiple boards share a same
config header file (for example include/configs/sunxi-common.h).

Moving this to Kconfig helps overcoming this issue. It's defined
as entry inside PHYLIB section.

After the implemention, moveconfig was run. The issues are:
	- edb9315a	- CONFIG_PHYLIB is not enabled. Entry is
			  deleted.

	- ds414		- CONFIG_PHYLIB is in incompatible format:
			  { 0x1, 0x0 }. This entry is also deleted.

	- devkit3250	- The PHY_ADDR is in hex format (0x1F).
			  Manually CONFIG_PHY_ADDR=31 is added in
			  the defconfig.

After the changes the suspicious defconfigs passes building.

Signed-off-by: Stefan Mavrodiev &lt;stefan@olimex.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
[jagan: rebased on master]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: smsc: Add SMSC LAN8741 support</title>
<updated>2018-02-26T21:51:37+00:00</updated>
<author>
<name>Arno Steffens</name>
<email>star@gmx.li</email>
</author>
<published>2018-01-25T12:08:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a0fd381fc60460a23d85c71ea06af0daa2427b2c'/>
<id>a0fd381fc60460a23d85c71ea06af0daa2427b2c</id>
<content type='text'>
Signed-off-by: Arno Steffens &lt;star@gmx.li&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Signed-off-by: Arno Steffens &lt;star@gmx.li&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: Fix style violations</title>
<updated>2018-02-26T21:48:55+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-01-15T10:08:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8d6312032e16c7413c16e3e6c827aeae2d0140b0'/>
<id>8d6312032e16c7413c16e3e6c827aeae2d0140b0</id>
<content type='text'>
Fix some style violations in the generic PHY management code.

Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix some style violations in the generic PHY management code.

Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: marvell 88e151x: Fix handling of bare RGMII interface type</title>
<updated>2018-02-26T21:47:07+00:00</updated>
<author>
<name>Mario Six</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2018-01-15T10:08:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=431be621c6cbc72efd1d45fa36686a682cbb470a'/>
<id>431be621c6cbc72efd1d45fa36686a682cbb470a</id>
<content type='text'>
Commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.

Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Commit 68e6ecadc551 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.

Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
