<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/net/phy, branch v2018.11-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: phy: ti: Add binding for the CLK_OUT pin muxing</title>
<updated>2018-10-10T17:28:54+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0f347a0096ad0c1e56d1b18b7eb60731d40d49c2'/>
<id>0f347a0096ad0c1e56d1b18b7eb60731d40d49c2</id>
<content type='text'>
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DP83867 has a muxing option for the CLK_OUT pin. It is possible
to set CLK_OUT for different channels.
Create a binding to select a specific clock for CLK_OUT pin.

Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for
the CLK_OUT pin muxing option") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Recover from "port mirroring" N/A MODE4</title>
<updated>2018-10-10T17:28:54+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=be71a74c59b7f34e83f3f6ea4b1a838de356c654'/>
<id>be71a74c59b7f34e83f3f6ea4b1a838de356c654</id>
<content type='text'>
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DP83867 when not properly bootstrapped - especially with LED_0 pin -
can enter N/A MODE4 for "port mirroring" feature.

To provide normal operation of the PHY, one needs not only to explicitly
disable the port mirroring feature, but as well stop some IC internal
testing (which disables RGMII communication).

To do that the STRAP_STS1 (0x006E) register must be read and RESERVED bit
11 examined. When it is set, the another RESERVED bit (11) at PHYCR
(0x0010) register must be clear to disable testing mode and enable RGMII
communication.

Thorough explanation of the problem can be found at following e2e thread:
"DP83867IR: Problem with RESERVED bits in PHY Control Register (PHYCR) -
Linux driver"

https://e2e.ti.com/support/interface/ethernet/f/903/p/571313/2096954#2096954

Based on commit ac6e058b75be ("net: phy: dp83867: Recover from "port mirroring"
N/A MODE4") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driver</title>
<updated>2018-10-10T17:28:53+00:00</updated>
<author>
<name>Janine Hagemann</name>
<email>j.hagemann@phytec.de</email>
</author>
<published>2018-08-28T06:25:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fba725f41002e5035e601a7cfa9429b0c8184211'/>
<id>fba725f41002e5035e601a7cfa9429b0c8184211</id>
<content type='text'>
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch adds support for enabling or disabling the lane swapping
(called "port mirroring" in PHY's CFG4 register) feature of the DP83867
TI's PHY device.

One use case is when bootstrap configuration enables this feature (because
of e.g. LED_0 wrong wiring) so then one needs to disable it in software
(at u-boot/Linux).

Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping
support in the DP83867 TI's PHY driver") of mainline linux kernel.

Signed-off-by: Janine Hagemann &lt;j.hagemann@phytec.de&gt;
Acked-by: Lukasz Majewski &lt;lukma@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: xilinx: switch to use phy_get_ofnode()</title>
<updated>2018-07-26T19:08:22+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-07-05T17:02:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aadbd97843f6cb50aaf4a9f3790058416d98f3b4'/>
<id>aadbd97843f6cb50aaf4a9f3790058416d98f3b4</id>
<content type='text'>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: dp83867: switch to use phy_get_ofnode()</title>
<updated>2018-07-26T19:08:22+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-07-05T17:02:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8d7ec782f3b969d828831359411203adfc20dd0'/>
<id>b8d7ec782f3b969d828831359411203adfc20dd0</id>
<content type='text'>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use PHY API phy_get_ofnode() helper to get PHY DT node.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: add ofnode node to struct phy_device</title>
<updated>2018-07-26T19:08:22+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-07-05T17:02:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eef0b8a930d1a8799b8ebd26e67e27401df6a9f7'/>
<id>eef0b8a930d1a8799b8ebd26e67e27401df6a9f7</id>
<content type='text'>
Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device using
"phy-handle" DT property and when Ethernet PHY driver needs to read some
additional information from DT. In such cases following happens (in
general):

- network drivers
	priv-&gt;phydev = phy_connect(priv-&gt;bus, priv-&gt;phyaddr, dev,
				   priv-&gt;interface);
	&lt;-- phydev is connected to dev which is UCLASS_ETH device

	if (priv-&gt;phy_of_handle &gt; 0)
		dev_set_of_offset(priv-&gt;phydev-&gt;dev, priv-&gt;phy_of_handle);
	&lt;-- phydev-&gt;dev-&gt;node is overwritten by phy-handle DT node

- PHY driver in .config() callback
	int node = dev_of_offset(dev);
	&lt;-- PHY driver uses overwritten dev-&gt;node
        const void *fdt = gd-&gt;fdt_blob;

	 if (fdtdec_get_bool(fdt, node, "property"))
		...

As result, UCLASS_ETH device can't be used any more for DT accessing.

This patch adds additional ofnode node field to struct phy_device which can
be set explicitly by network drivers and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device-&gt;node or dev_ofnode(phydev-&gt;dev) for
backward compatibility with existing drivers.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now the UCLASS_ETH device "node" field is owerwritten by some network drivers in
case of Ethernet PHYs which are linked to UCLASS_ETH device using
"phy-handle" DT property and when Ethernet PHY driver needs to read some
additional information from DT. In such cases following happens (in
general):

- network drivers
	priv-&gt;phydev = phy_connect(priv-&gt;bus, priv-&gt;phyaddr, dev,
				   priv-&gt;interface);
	&lt;-- phydev is connected to dev which is UCLASS_ETH device

	if (priv-&gt;phy_of_handle &gt; 0)
		dev_set_of_offset(priv-&gt;phydev-&gt;dev, priv-&gt;phy_of_handle);
	&lt;-- phydev-&gt;dev-&gt;node is overwritten by phy-handle DT node

- PHY driver in .config() callback
	int node = dev_of_offset(dev);
	&lt;-- PHY driver uses overwritten dev-&gt;node
        const void *fdt = gd-&gt;fdt_blob;

	 if (fdtdec_get_bool(fdt, node, "property"))
		...

As result, UCLASS_ETH device can't be used any more for DT accessing.

This patch adds additional ofnode node field to struct phy_device which can
be set explicitly by network drivers and used by PHY drivers, so
overwriting can be avoided. Also add helper function phy_get_ofnode()
which will check and return phy_device-&gt;node or dev_ofnode(phydev-&gt;dev) for
backward compatibility with existing drivers.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: Clean up includes of common.h</title>
<updated>2018-07-26T19:08:22+00:00</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2018-07-25T17:59:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=05b60ac549bbb1cc0738b96d2ee0e342d90bbc1f'/>
<id>05b60ac549bbb1cc0738b96d2ee0e342d90bbc1f</id>
<content type='text'>
We want to be able to include some other system headers in phy.h but
that requires us to have included common.h in the top-level first.

Also, common.h includes config.h as the first thing it does, so don't
include it directly.

Series-to: u-boot
Series-cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Seried-cc: ti
Series-process-log: sort, uniq
Cover-letter:
Prepare for net: phy: prevent uclass_eth device "node" field overwriting
Prepare for [1] so that it doesn't break the build for a bunch of
boards. There are a number of reasons this series broke the build
but none of them depend on changes in the series, so fix up those
situations ahead of applying that series.

[1] https://patchwork.ozlabs.org/cover/940104/
END
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
We want to be able to include some other system headers in phy.h but
that requires us to have included common.h in the top-level first.

Also, common.h includes config.h as the first thing it does, so don't
include it directly.

Series-to: u-boot
Series-cc: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Seried-cc: ti
Series-process-log: sort, uniq
Cover-letter:
Prepare for net: phy: prevent uclass_eth device "node" field overwriting
Prepare for [1] so that it doesn't break the build for a bunch of
boards. There are a number of reasons this series broke the build
but none of them depend on changes in the series, so fix up those
situations ahead of applying that series.

[1] https://patchwork.ozlabs.org/cover/940104/
END
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: dp83867: switch to use ofnode api</title>
<updated>2018-07-26T19:08:21+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-06-28T19:26:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ab75cf76e78d2ce729896625504cdfff1d3d8a5'/>
<id>3ab75cf76e78d2ce729896625504cdfff1d3d8a5</id>
<content type='text'>
Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Switch to use more generic ofnode API instead of FDT API.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: dp83867: add workaround for incorrect RX_CTRL pin strap</title>
<updated>2018-07-26T19:08:21+00:00</updated>
<author>
<name>Murali Karicheri</name>
<email>m-karicheri2@ti.com</email>
</author>
<published>2018-06-28T19:26:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=63d319298452084d7aed2fe066d916605601939e'/>
<id>63d319298452084d7aed2fe066d916605601939e</id>
<content type='text'>
The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).

It further advises that if a board has this pin strapped in mode 1 and
mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must
be cleared to 0. This is to ensure proper operation of PHY.

Since it is not possible to detect in software if RX_DV/RX_CTRL pin is
incorrectly strapped, add a device-tree property to advertise this and
allow corrective action in software.
[1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf

Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Reviewed-by: Hannes Schmelzer &lt;oe5hpm@oevsv.at&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The data manual for DP83867IR/CR, SNLS484E[1], revised march 2017,
advises that strapping RX_DV/RX_CTRL pin in mode 1 and 2 is not
supported (see note below Table 5 (4-Level Strap Pins)).

It further advises that if a board has this pin strapped in mode 1 and
mode 2, then bit[7] of Configuration Register 4 (address 0x0031) must
be cleared to 0. This is to ensure proper operation of PHY.

Since it is not possible to detect in software if RX_DV/RX_CTRL pin is
incorrectly strapped, add a device-tree property to advertise this and
allow corrective action in software.
[1] http://www.ti.com/lit/ds/snls484e/snls484e.pdf

Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Reviewed-by: Hannes Schmelzer &lt;oe5hpm@oevsv.at&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Tested-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: mv88e61xx: Force CPU port link up</title>
<updated>2018-06-13T18:54:17+00:00</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2018-06-03T04:21:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3cb51dad0dff5de5f4fff25639d2a88efead0691'/>
<id>3cb51dad0dff5de5f4fff25639d2a88efead0691</id>
<content type='text'>
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When connecting to from a CPU direct to a 88e6097 typically RGMII is
used. In order for traffic to actually pass we need to force the link up
so the CPU MAC on the other end will see the link.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
