u-boot.git/drivers/net/phy, branch v2024.01

tree-wide: Replace http:// link with https:// link for ti.com

2023-11-10T16:01:50+00:00

Replace instances of http://www.ti.com with https://www.ti.com

Signed-off-by: Nishanth Menon

net: phy: TI DP83869 fix invalid clock delay configuration

2023-11-05T21:11:38+00:00

Setting the clock delay from the device tree settings
rx-internal-delay-ps and tx-internal-delay-ps was broken:

 - The expected value in the device tree is suppose to be a
   delay in picoseconds, but the driver only allowed an array index.
 - Driver converted this array index to the actual delay in
   picoseconds and tried to apply this in the device register. This
   however is not a valid register value. The actual logic here was
   reversed, it converted an register representation of the delay to
   the device tree delay in picoseconds.

Only when the internal delays were NOT configured in the device tree
and they default value of 7 (=2000ps) was used, a valid value was
loaded in the register.

Signed-off-by: Frank de Brabander

net: phy: xilinx_phy: Get rid of using property xlnx, phy-type

2023-10-10T12:57:29+00:00

As the xlnx,phy-type device tree property is deprecated and phy-mode
is being used, so removing the code references of xlnx,phy-type.

Signed-off-by: Venkatesh Yadav Abbarapu 
Link: https://lore.kernel.org/r/20231010030436.11854-1-venkatesh.abbarapu@amd.com
Signed-off-by: Michal Simek

common: Drop linux/printk.h from common header

2023-09-24T13:54:57+00:00

This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h

Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass

net: phy: xilinx-gmii2rgmii: Removed hardcoded phy address 0 for bridge

2023-09-21T11:20:11+00:00

Current code expects bridge phy address at 0 which is not correct
expectation because bridge phy address is configurable.
That's why update the code to read reg property to figure it out
where bridge is and use it in phy creation code.

Signed-off-by: Tejas Bhumkar 
Signed-off-by: Michal Simek 
Link: https://lore.kernel.org/r/20230915045043.4167628-1-tejas.arvind.bhumkar@amd.com

net: phy: Remove unused NEEDS_MANUAL_RELOC code bits

2023-09-14T14:42:25+00:00

The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut

net: miiphybb: Remove unused NEEDS_MANUAL_RELOC code bits

2023-09-14T14:42:25+00:00

The last user of the NEEDS_MANUAL_RELOC has been removed in commit
26af162ac8f8 ("arch: m68k: Implement relocation")
Remove now unused NEEDS_MANUAL_RELOC code.

Signed-off-by: Marek Vasut

net: phy: broadcom: add support for BCM54210E

2023-09-13T19:52:20+00:00

It's Broadcom PHY simply described as single-port
RGMII 10/100/1000BASE-T PHY. It requires disabling
delay skew and GTXCLK bits.

BCM54210E support ported from Linux kernel commit
0fc9ae1076697 ("net: phy: broadcom: add support for BCM54210E")
AUX/SHD/bcm54xx_config_clock_delay update ported from Linux 6.5-rc4 commit
28e219aea0b9e ("net: phy: broadcom: drop brcm_phy_setbits() and use phy_set_bits() instead")

Signed-off-by: Marek Vasut 
Reviewed-by: Rafał Miłecki

net: phy: motorcomm: Add support for YT8511 PHY

2023-09-13T19:52:20+00:00

The YT8511 ethernet PHYs can be found on e.g. the SOQuartz or
the Quartz64. Add rudimentary support for them.

Signed-off-by: Nicolas Frattaroli

phy: adin: add readext and writeext support for mdio cmd

2023-07-27T18:32:12+00:00

The adin phy has extended registers that can be accessed using
adin_ext_read and adin_ext_write. These registers can be read directly
using the mdio command using readext and writext. For example:

     => mdio rx ethernet@428a0000 0xff23
     Reading from bus ethernet@428a0000
     PHY at address 0:
     65315 - 0xe01

Signed-off-by: Nate Drude 
Reviewed-by: Marek Vasut