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<title>u-boot.git/drivers/net/ti, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: ti: am65-cpsw-nuss: Add new compatible for J721e</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-12-04T16:47:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=382c0c629e75b6213b638f734db468e23ca4cff3'/>
<id>382c0c629e75b6213b638f734db468e23ca4cff3</id>
<content type='text'>
Add new compatible to handle J721e SoC

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Add new compatible to handle J721e SoC

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: am65-cpsw-nuss: Rework RX flow ID handling</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-12-04T16:47:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=461a290c5afbbb00dcbd671bedcad13abea9b37a'/>
<id>461a290c5afbbb00dcbd671bedcad13abea9b37a</id>
<content type='text'>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: cpsw: Add NULL pointer check</title>
<updated>2019-12-03T13:44:14+00:00</updated>
<author>
<name>Faiz Abbas</name>
<email>faiz_abbas@ti.com</email>
</author>
<published>2019-11-11T09:52:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ae3ef109c308652d2143019038a49b43917fdf12'/>
<id>ae3ef109c308652d2143019038a49b43917fdf12</id>
<content type='text'>
Add null pointer check to take care of out of memory errors.

Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Add null pointer check to take care of out of memory errors.

Signed-off-by: Faiz Abbas &lt;faiz_abbas@ti.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>common: Move ARM cache operations out of common.h</title>
<updated>2019-12-02T23:24:58+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1eb69ae498567bb0b62ee554647204e8245cdacc'/>
<id>1eb69ae498567bb0b62ee554647204e8245cdacc</id>
<content type='text'>
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
These functions are CPU-related and do not use driver model. Move them to
cpu_func.h

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: cpsw: convert to use dev/ofnode api</title>
<updated>2019-11-04T17:56:37+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=62f8e846a7d6f894834a013224936db682f7e484'/>
<id>62f8e846a7d6f894834a013224936db682f7e484</id>
<content type='text'>
Conver TI CPSW driver to use dev/ofnode api.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
[trini: Add &lt;dm/ofnode.h&gt; to provide the prototype to ofnode]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
Conver TI CPSW driver to use dev/ofnode api.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
[trini: Add &lt;dm/ofnode.h&gt; to provide the prototype to ofnode]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: am65x-cpsw: fix mac tx internal delay for rgmii-rxid mode</title>
<updated>2019-11-03T14:36:06+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=da6a728ea4169ea602614bbe171921901f47d871'/>
<id>da6a728ea4169ea602614bbe171921901f47d871</id>
<content type='text'>
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY
interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping
default value (enabled) for MAC TX internal delay when "rgmii-rxid"
interface mode is selected.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY
interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping
default value (enabled) for MAC TX internal delay when "rgmii-rxid"
interface mode is selected.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: cpsw: fix mac tx internal delay for rgmii-rxid mode</title>
<updated>2019-11-03T14:36:06+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a3c867a217b021e92f5e3afd2bb1415ffd28d0d7'/>
<id>a3c867a217b021e92f5e3afd2bb1415ffd28d0d7</id>
<content type='text'>
Now TI CPSW driver will disable MAC TX internal delay for PHY interface
mode "rgmii-rxid" which is incorrect.

Hence, fix it by keeping default value (enabled) for MAC TX internal delay
when "rgmii-rxid" interface mode is selected.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Now TI CPSW driver will disable MAC TX internal delay for PHY interface
mode "rgmii-rxid" which is incorrect.

Hence, fix it by keeping default value (enabled) for MAC TX internal delay
when "rgmii-rxid" interface mode is selected.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: cpsw: add support for standard eth "max-speed" dt property</title>
<updated>2019-11-03T14:36:06+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:39+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3c57b620db1764335caaba0367e46b058ff9d724'/>
<id>3c57b620db1764335caaba0367e46b058ff9d724</id>
<content type='text'>
This patch adds support for standard Ethernet "max-speed" DT property to
allow PHY link speed limitation.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
This patch adds support for standard Ethernet "max-speed" DT property to
allow PHY link speed limitation.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: cpsw: move parsing of dt port's parameters in separate func</title>
<updated>2019-11-03T14:36:06+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4040148b9e932124f843f309d0b344376337311b'/>
<id>4040148b9e932124f843f309d0b344376337311b</id>
<content type='text'>
Move parsing of dt port's parameters in separate func for better code
readability.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Move parsing of dt port's parameters in separate func for better code
readability.

Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: cpsw: enable 10Mbps link speed support in rgmii mode</title>
<updated>2019-11-03T14:36:06+00:00</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2019-09-19T08:16:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=60e81d0d2855690347bc479c9c20b4ad5de0b703'/>
<id>60e81d0d2855690347bc479c9c20b4ad5de0b703</id>
<content type='text'>
According to TRMs the 10Mbps link speed is supported in RGMII only when
CPSW2G MAC SL is configured for External Control ("in band") mode
CPSW_SL_MACCTRL.EXT_EN(18) = 1.

Hence update cpsw_slave_update_link() to follow documentation.

[1] https://patchwork.kernel.org/patch/10285239/
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
According to TRMs the 10Mbps link speed is supported in RGMII only when
CPSW2G MAC SL is configured for External Control ("in band") mode
CPSW_SL_MACCTRL.EXT_EN(18) = 1.

Hence update cpsw_slave_update_link() to follow documentation.

[1] https://patchwork.kernel.org/patch/10285239/
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
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