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<title>u-boot.git/drivers/net/tsec.c, branch v2016.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>ls102xa: etsec: Use proper settings for BE BDs</title>
<updated>2015-09-02T02:39:03+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2015-08-12T10:29:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ebe4c1e6469444753bd2ba93fe63e6183cf2905c'/>
<id>ebe4c1e6469444753bd2ba93fe63e6183cf2905c</id>
<content type='text'>
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.

Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Acked-by: Alison Wang &lt;alison.wang@freescale.com&gt;
Tested-by: Alison Wang &lt;alison.wang@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Replace the DMACTRL[LE] hack with recommended settings
for ETSECDMAMCR to get the same end effect - obtaining
big-endian buffer descriptors and frame data for eTSEC.
The reset / default value for ETSECDMAMCR is preserved,
excepting the BD and FR bits which are cleared to enable
the BE mode in accordance with the H/W specifications.

Fixes: 52d00a8 "ls102xa: etsec: Add etsec support for LS102xA"
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Acked-by: Alison Wang &lt;alison.wang@freescale.com&gt;
Tested-by: Alison Wang &lt;alison.wang@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: cosmetic: Fix var naming net &lt;-&gt; eth drivers</title>
<updated>2015-04-18T17:11:33+00:00</updated>
<author>
<name>Joe Hershberger</name>
<email>joe.hershberger@ni.com</email>
</author>
<published>2015-04-08T06:41:06+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1fd92db83d399ff7918e51ba84bc73d2466b5eb6'/>
<id>1fd92db83d399ff7918e51ba84bc73d2466b5eb6</id>
<content type='text'>
Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the temporary hacks that were added to this interface
along with the DM support.

This patch has a few remaining checkpatch.pl failures that would be out
of the scope of this patch to fix (drivers that are in gross violation
of checkpatch.pl).

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Update the naming convention used in the network stack functions and
variables that Ethernet drivers use to interact with it.

This cleans up the temporary hacks that were added to this interface
along with the DM support.

This patch has a few remaining checkpatch.pl failures that would be out
of the scope of this patch to fix (drivers that are in gross violation
of checkpatch.pl).

Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Fix NULL access in case init_phy() fails</title>
<updated>2015-01-30T21:55:00+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-12-10T13:21:04+00:00</published>
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<id>7f233c05573fabe8ff1ed7f22c269cdfdfc30529</id>
<content type='text'>
If the PHY is not recognized don't access phydev (NULL)
and return 0 to signal failure.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
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<pre>
If the PHY is not recognized don't access phydev (NULL)
and return 0 to signal failure.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Signed-off-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>ls102xa: etsec: Add etsec support for LS102xA</title>
<updated>2014-09-08T17:30:33+00:00</updated>
<author>
<name>Alison Wang</name>
<email>b18965@freescale.com</email>
</author>
<published>2014-09-05T05:52:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=52d00a812a29974e660f64a8839ddb550dca5290'/>
<id>52d00a812a29974e660f64a8839ddb550dca5290</id>
<content type='text'>
This patch is to add etsec support for LS102xA. First, Little-endian
descriptor mode should be enabled. So RxBDs and TxBDs are interpreted
with little-endian byte ordering. Second, TSEC_SIZE and TSEC_MDIO_OFFSET
are different from PowerPC, redefine them for LS1021xA.

Signed-off-by: Alison Wang &lt;alison.wang@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch is to add etsec support for LS102xA. First, Little-endian
descriptor mode should be enabled. So RxBDs and TxBDs are interpreted
with little-endian byte ordering. Second, TSEC_SIZE and TSEC_MDIO_OFFSET
are different from PowerPC, redefine them for LS1021xA.

Signed-off-by: Alison Wang &lt;alison.wang@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Fix mac addr setup portability, cleanup</title>
<updated>2013-11-22T23:03:17+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-09-30T09:44:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b1690bc39cfdba82be34b1a98abc319339070698'/>
<id>b1690bc39cfdba82be34b1a98abc319339070698</id>
<content type='text'>
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.

Free the stack from rendundant local vars:
tmpbuf[] and i.

Use a portable type (u32) for the 32bit tsec register value
holder: tempval.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.

Free the stack from rendundant local vars:
tmpbuf[] and i.

Use a portable type (u32) for the 32bit tsec register value
holder: tempval.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Use portable regs type (uint-&gt;u32)</title>
<updated>2013-11-22T23:03:17+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-09-30T09:44:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=82ef75ca5c69c7d053c07f509a901d2ad2e29570'/>
<id>82ef75ca5c69c7d053c07f509a901d2ad2e29570</id>
<content type='text'>
Use cross arch portable u32 instead of uint for the
tsec registers.  Remove the typedefs for the register
struct definitions in the process.  Fix long lines.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Use cross arch portable u32 instead of uint for the
tsec registers.  Remove the typedefs for the register
struct definitions in the process.  Fix long lines.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Use portable types and accessors for BDs</title>
<updated>2013-11-22T23:03:16+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-10-04T16:13:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9c9141fd04f0991209dab9fe2716ce19b2a4f552'/>
<id>9c9141fd04f0991209dab9fe2716ce19b2a4f552</id>
<content type='text'>
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor.  This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.

Use portable data types for the Rx/Tx buffer descriptor
fields.  Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.

Cc: Scott Wood &lt;scottwood@freescale.com&gt;

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor.  This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.

Use portable data types for the Rx/Tx buffer descriptor
fields.  Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.

Cc: Scott Wood &lt;scottwood@freescale.com&gt;

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Fix CamelCase issues around BD code</title>
<updated>2013-11-22T23:03:16+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-09-30T09:44:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=18b338fb3486ac91291e1f94561cb47fd0f4aef2'/>
<id>18b338fb3486ac91291e1f94561cb47fd0f4aef2</id>
<content type='text'>
Fix bufPtr and the rxIdx/ txIdx occurrences to
solve the related checkpatch warnings for the
coming patches.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Fix bufPtr and the rxIdx/ txIdx occurrences to
solve the related checkpatch warnings for the
coming patches.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Cleanup tsec regs init and fix __iomem warns</title>
<updated>2013-11-22T23:03:15+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-09-30T09:44:42+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aec84bf6719f9efcc754acfb08b8ca866c8a5e95'/>
<id>aec84bf6719f9efcc754acfb08b8ca866c8a5e95</id>
<content type='text'>
Remove tsec_t typedef.  Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:

tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19:    expected unsigned int volatile [noderef]
&lt;asn:2&gt;*addr
tsec.c:394:19:    got unsigned int *&lt;noident&gt;
[...]

Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Remove tsec_t typedef.  Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:

tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19:    expected unsigned int volatile [noderef]
&lt;asn:2&gt;*addr
tsec.c:394:19:    got unsigned int *&lt;noident&gt;
[...]

Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: tsec: Fix priv pointer in tsec_mcast_addr()</title>
<updated>2013-11-22T23:02:56+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@freescale.com</email>
</author>
<published>2013-09-30T09:44:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b200204e8e2a2eee081d576ed578d87b75813b46'/>
<id>b200204e8e2a2eee081d576ed578d87b75813b46</id>
<content type='text'>
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context.  Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.

This fix leads to removal of the unused (faulty) privlist[]
and related global static vars.  Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev-&gt;priv is correctly
initialized upon mcast() call.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Patch: 278990
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context.  Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.

This fix leads to removal of the unused (faulty) privlist[]
and related global static vars.  Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev-&gt;priv is correctly
initialized upon mcast() call.

Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@freescale.com&gt;
Patch: 278990
</pre>
</div>
</content>
</entry>
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