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<title>u-boot.git/drivers/net, branch next</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
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<updated>2026-08-25T17:36:46Z</updated>
<entry>
<title>Merge tag 'mediatek-for-next-2026-08-24' of https://git.u-boot-project.org/u-boot/custodians/u-boot-mediatek into next</title>
<updated>2026-08-25T17:36:46Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-08-25T17:36:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=640cd54caede8086f0ccfc597ce3eef6d998f9e2'/>
<id>urn:sha1:640cd54caede8086f0ccfc597ce3eef6d998f9e2</id>
<content type='text'>
* New HDMI PHY and I2C DDC drivers, default EDID_ADDR macro
* MT8189 clock qualifier fix
* Phase-aware PSCI reset (MT8195/MT8365)
* dwc_eth_qos MT8366 support
* MediaTek TPHY v3 hardware support
* mtk_snor mt8188/mt8189 compatible-string cleanup
* MT6358/MT6366 PMIC regulator + pwrap support
* MediaTek pinctrl Kconfig cleanup (per-SoC symbols → single driver + TARGET_*)
* New MT8366 pinctrl driver + dt-bindings header
* MediaTek serial driver clock-handling fixes
</content>
</entry>
<entry>
<title>net: dwc_eth_qos: add mt8366 support</title>
<updated>2026-08-24T23:04:28Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-08-06T16:15:01Z</published>
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<id>urn:sha1:34b86a6741e7cd7ec83c9926bd8a81ddb3206079</id>
<content type='text'>
Add a compatible string match for MT8366 targets.

Reviewed-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Link: https://patch.msgid.link/20260806-mtk-net-mt8366-support-v1-3-5eb259ff69dd@baylibre.com
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos_mtk: add mt8366 support</title>
<updated>2026-08-24T23:04:27Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-08-06T16:15:00Z</published>
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<id>urn:sha1:66e793bc93738d32e9dd20bab37f5020724a4940</id>
<content type='text'>
Add a compatible string match and new PERI_ETH_BASE address for MT8366
targets.

Reviewed-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Link: https://patch.msgid.link/20260806-mtk-net-mt8366-support-v1-2-5eb259ff69dd@baylibre.com
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos_mtk: support platform-specific PERI_ETH_BASE</title>
<updated>2026-08-24T23:04:27Z</updated>
<author>
<name>David Lechner</name>
<email>dlechner@baylibre.com</email>
</author>
<published>2026-08-06T16:14:59Z</published>
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<id>urn:sha1:04845af8b08ea651359a4ff3137d59f3f2384794</id>
<content type='text'>
Add infrastructure to support future MediaTek platforms that have a
different PERI_ETH_BASE address. There are at least 3 different known
base address for this.

Reviewed-by: Julien Stephan &lt;jstephan@baylibre.com&gt;
Link: https://patch.msgid.link/20260806-mtk-net-mt8366-support-v1-1-5eb259ff69dd@baylibre.com
Signed-off-by: David Lechner &lt;dlechner@baylibre.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'net-20260813' of https://git.u-boot-project.org/u-boot/custodians/u-boot-net</title>
<updated>2026-08-13T14:58:29Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-08-13T14:58:29Z</published>
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<id>urn:sha1:c2ac5fc4e3bc91f59f059f115939d28fe35a7841</id>
<content type='text'>
Pull request net-20260813.

net:
- phy: dp83867: enable extended read / write for driver
- phy: fix duplicate eth_phy binding
- Drop unnecessary device_set_name
- dwc_eth_xgmac: Return -ENODEV when phy_connect() fails
- nfs: clean up bounds checks in nfs_readlink_reply()
- rtl8169: add support for RTL8126A and RTL8127A
- srand_mac(): fix -ENODEV crash with CONFIG_DM_RNG

net-legacy:
- Fix out-of-bounds write in IP fragment reassembly
- test: net: add regression test for IP reassembly overflow

net-lwip:
- Add tftpsrv command
- Handle chained pbufs in transmit path
- sntp: fix netif leak when ntpserverip is unset
- wget: free mbedtls x509 cert context to avoid memory leak
- Fix DHCP fine timer interval
</content>
</entry>
<entry>
<title>net: rtl8169: add support for RTL8126A and RTL8127A</title>
<updated>2026-08-04T08:00:32Z</updated>
<author>
<name>Javen Xu</name>
<email>javen_xu@realsil.com.cn</email>
</author>
<published>2026-07-22T07:50:57Z</published>
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<id>urn:sha1:a1aaacc968ae995b7557a316907c2e2f073b1a17</id>
<content type='text'>
RTL8126A and RTL8127A share most of the register layouts and quirks with
RTL8125 series, but require explicit desc type and CRC-drop setup during
init.

This patch adds PCI IDs and MAC versions. RTL8126A is 0x66 and RTL8127A
is 0x6e. And RTL8127A requires Tx Desc V3 format and an additional RADM
FIFO protection configuration according to vendor driver.

Signed-off-by: Javen Xu &lt;javen_xu@realsil.com.cn&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos: add support for sun55i platform</title>
<updated>2026-07-26T22:30:21Z</updated>
<author>
<name>Junhui Liu</name>
<email>junhui.liu@pigmoral.tech</email>
</author>
<published>2026-05-19T12:58:28Z</published>
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<id>urn:sha1:c5d3fac4becf7ca5db58a6937ddaf69df0070834</id>
<content type='text'>
The Allwinner sun55i (A523/A527/T527) platform features the Synopsys
DesignWare Ethernet QOS IP. To enable this GMAC controller in U-Boot,
this introduces the glue layer responsible for configuring the
corresponding clocks, resets, and syscon registers.

This implementation is directly ported from upstream Linux kernel commit
f603808a98af ("net: stmmac: Add support for Allwinner A523 GMAC200").

Link: https://patch.msgid.link/20250925191600.3306595-3-wens@kernel.org
Signed-off-by: Junhui Liu &lt;junhui.liu@pigmoral.tech&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_xgmac: Return -ENODEV when phy_connect() fails</title>
<updated>2026-07-23T15:05:21Z</updated>
<author>
<name>Boon Khai Ng</name>
<email>boon.khai.ng@altera.com</email>
</author>
<published>2026-07-14T07:19:27Z</published>
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<id>urn:sha1:f517fdbc0ddcb9bdcb773640f164ddcb924d877c</id>
<content type='text'>
When multiple Ethernet controllers are enabled in the device tree,
but only one controller is actually present in hardware, the
non-existent controller still attempts to connect to a PHY.

In this case, phy_connect() may return NULL without setting an
error code. The current driver only logs the failure but does not
propagate an error, causing the initialization flow to continue
with an invalid PHY handle.

This leads to failures later in the initialization sequence.

Fix this by explicitly setting ret = -ENODEV when phy_connect()
returns NULL, ensuring the driver exits cleanly on failure.

Signed-off-by: Boon Khai Ng &lt;boon.khai.ng@altera.com&gt;
</content>
</entry>
<entry>
<title>net: Drop unnecessary device_set_name</title>
<updated>2026-07-23T15:05:20Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2026-07-03T07:50:19Z</published>
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<id>urn:sha1:afcd55654d858f8f6c92847e895650c443c5f8ec</id>
<content type='text'>
When device was created, it already has a name assigned. There is
no need to alloc space for name and set it with same device name.

Cleanup the code to avoid unnecessary device_set_name.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Jerome Forissier &lt;jerome.forissier@arm.com&gt;
</content>
</entry>
<entry>
<title>net: phy: fix duplicate eth_phy binding</title>
<updated>2026-07-23T15:05:20Z</updated>
<author>
<name>Pranav Tilak</name>
<email>pranav.vinaytilak@amd.com</email>
</author>
<published>2026-06-10T10:39:57Z</published>
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<id>urn:sha1:2671bd1d77abdbf0b52a52e1419e01543476143b</id>
<content type='text'>
When both CONFIG_PHY_ETHERNET_ID and CONFIG_DM_ETH_PHY are enabled,
eth_phy_binds_nodes() called from eth_post_bind() already binds the
ethernet PHY node to eth_phy_generic_drv. However, phy_connect_phy_id()
called via phy_connect() also binds the same PHY node, resulting in
duplicate entries in the DM tree.

Fix this by introducing phy_connect_dm_bound() which checks if the PHY
is already bound via uclass_find_device_by_phandle(). If so, it gets
the phy_device via phy_find_by_mask() since the udevice does not store
a phy_device pointer and the phy_device can only be obtained by
scanning the MDIO bus. The phydev-&gt;node is then set from the
already-bound DM device. This skips the generic binding methods
in phy_connect() when the PHY is already DM-bound.

Fixes: 68a4d1506109 ("net: phy: Bind ETH_PHY uclass driver to each new PHY")
Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
</content>
</entry>
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