sh_eth_reset is function to reset Ether IP.
The MAC address is stored in IP, but it is initialized by this function.
OS (e.g. Linux Kernel) can not use this device when initialized.
This revises this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>

Set a non-zero speed in the MII register so that MII commands will work.

Signed-off-by: Jon Smirl <jonsmirl@gmail.com>

Commit af1c2b84 added a generic phy support, with an ID of zero
and a 32 bit mask; meaning that it will match on any PHY ID.

The problem is that there is a test that checked if a matching
PHY was found, and if not, it printed the non-matching ID.
But since there will always be a match (on the generic PHY,
worst case), this test will never trip.

In the case of a misconfigured PHY address, or of a PHY that
isn't explicitly supported outside of the generic support,
you will never see the ID of 0xffffffff, or the ID of the
real (but unsupported) chip.  It will silently fall through
onto the generic support.

This change makes that test useful again, and ensures that
the selection of generic PHY support doesn't happen without
some sort of notice.  It also makes it explicitly clear that
the generic PHY must be last in the PHY table.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Andy Fleming <afleming@freescale.com>

The smc911x driver has a lot of useful defines/functions which can be used
by pieces of code (such as example eeprom programmers).  Rather than
forcing each place to duplicate these defines/functions, split them out
of the smdc911x driver into a local header.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
CC: Sascha Hauer <s.hauer@pengutronix.de>
CC: Guennadi Liakhovetski <lg@denx.de>
CC: Magnus Lilja <lilja.magnus@gmail.com>
CC: Ben Warren <biggerbadderben@gmail.com>

Added the struct containing PHY settings for the Vitesse VSC8211 phy to
the phy_info list in tsec.c

Signed-off-by: Pieter Henning <phenning@vastech.co.za>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>

Added new CONFIG options for the three type of MAC-PHY interconnect and
applied them all relevant board config files

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

SOFT_RESET must be asserted for at least 3 TX clocks.  Usually, that's about 30
clock cycles, so it's been mostly working.  But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles).  This
enforces a 2 microsecond gap between assertion and deassertion.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

100Mbs ethernet does not work on sh7763 chips due to the wrong value being
used in the GECMR register. Following diff fixes the problem

Signed-off-by: Simon Munton	<simon@nidoran.m5data.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>