u-boot.git/drivers/net, branch v2012.04.01

net: ll_temac: drop obsolete "NAMESIZE" define

2012-04-21T15:28:03+00:00

... after commit "net/miiphy/serial: drop duplicate NAMESIZE
define" (sha1:f6add13) was applied. The building of the new
LL TEMAC network driver fails with error below:

xilinx_ll_temac.c: In function 'xilinx_ll_temac_initialize':
xilinx_ll_temac.c:301: error: 'NAMESIZE' undeclared (first use in this function)
xilinx_ll_temac.c:301: error: (Each undeclared identifier is reported only once
xilinx_ll_temac.c:301: error: for each function it appears in.)

Signed-off-by: Stephan Linz 
Acked-by: Mike Frysinger

net/designware: Change timeout loop implementation

2012-04-04T15:47:53+00:00

The new implementation changes the timeout loop implementation to avoid 1 ms
delay in each failing test. It also configures the delay to 10usec.

Signed-off-by: Amit Virdi

net/designware: Set ANAR to 0x1e1

2012-04-04T15:47:40+00:00

This patch forces the advertised capabilities during auto
negotiation to always be 10/100 Mbps and half/full as duplexing.

Signed-off-by: Armando Visconti 
Signed-off-by: Amit Virdi

net/designware: Program phy registers when auto-negotiation is ON

2012-04-04T15:47:34+00:00

If AN(auto-negotiation) is ON, speed bit of control register are not
applicable.  Also phy registers were not getting programmed as per the
result of AN. This patch sets only AN bit & restart AN bit for AN ON
selection & programs PHY registers as per AN result.

Signed-off-by: Vikas Manocha 
Signed-off-by: Amit Virdi

net/designware: Try configuring phy on each dw_eth_init

2012-04-04T15:47:21+00:00

Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.

This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.

Signed-off-by: Vipin Kumar 
Signed-off-by: Amit Virdi

net/designware: Consecutive writes must have delay

2012-04-04T15:47:09+00:00

This patch solves a TX/RX problem which happens at 10Mbps, due to the
fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between
two consecutive writes on the same register.

Signed-off-by: Armando Visconti 
Signed-off-by: Amit Virdi

net/designware: Phy address fix

2012-04-04T15:46:59+00:00

The code assumes the phy address to be > 0, which is not true, the phy address
can be in the range 0-31.

Signed-off-by: Vipin Kumar 
Signed-off-by: Amit Virdi

net/designware: Fix the max frame length size

2012-04-04T15:46:51+00:00

The max frame length for normal descriptor can be 0x7FF i.e 2047. It was wrongly
specified as 2048. Currently, the max descriptor length is around 1500, so
redefining the mask to 1600

Signed-off-by: Vipin Kumar 
Signed-off-by: Amit Virdi

net/designware: Fix to restore hw mac address

2012-04-04T15:46:39+00:00

The network controller mac resets hardware address stored in MAC_HI and MAC_LO
registers if mac is resetted. So, hw mac address needs to be restored in case
mac is explicitly resetted from driver.

Signed-off-by: Vipin Kumar 
Signed-off-by: Amit Virdi

net: ll_temac: Add LL TEMAC driver to u-boot

2012-04-04T14:36:19+00:00

Xilinx LocalLink Tri-Mode Ether MAC driver can be
used by Xilinx Microblaze or Xilinx ppc405/440 in
SDMA and FIFO mode. DCR or XPS bus can be used.

The driver uses and requires MII and PHYLIB.

CP: 4 warnings: 'Use of volatile is usually wrong'
I won't fix this, because it depends on the network
driver subsystem.

Reported-by: Michal Simek 
Signed-off-by: Stephan Linz