u-boot.git/drivers/net, branch v2013.07

net: phy: Set SUPPORTED_1000baseX_Half flag in ESTATUS_1000_XHALF case

2013-07-19T21:12:20+00:00

Commit de1d786e (add support for Xilinx 1000BASE-X phy (GTX)) introduced the
checking for ESTATUS_1000_XHALF, but it incorrectly sets the
SUPPORTED_1000baseX_Full flag in this case.

Set the SUPPORTED_1000baseX_Half flag instead.

Acked-by: Charles Coldwell 
Reviewed-By: Sascha Silbe 
Reviewed-by: Joe Hershberger 
Signed-off-by: Fabio Estevam

phy: fix 10/100Mbps operation on 1Gbps-capable links

2013-07-19T21:12:16+00:00

de1d786 [add support for Xilinx 1000BASE-X phy (GTX)] introduced a
check for the extended status register in order to support
1Gbps-capable PHYs that don't have the 1000BASE-T registers. Since
Extended Status only indicates what the PHY (i.e. the local side) is
capable of, this broke communication with non-1Gbps peers.

Only check the extended status if the 1000BASE-T registers are
actually missing so we don't end up setting speed to 1Gbps even though
the previous test (for the combination of local and peer support for
1Gbps) already indicated we can't do 1Gbps with the current peer.

Signed-off-by: Sascha Silbe 
Tested-by: Fabio Estevam 
Reviewed-by: Joe Hershberger

Merge branch 'master' of git://git.denx.de/u-boot-arm

2013-07-12T14:36:48+00:00

Fix a trivial conflict in arch/arm/dts/exynos5250.dtsi about gpio and
serial.

Conflicts:
	arch/arm/dts/exynos5250.dtsi

Signed-off-by: Tom Rini

Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'

2013-07-12T11:20:35+00:00

net: fec: Avoid MX28 bus sync issue

2013-07-12T07:29:32+00:00

The MX28 multi-layer AHB bus can be too slow and trigger the
FEC DMA too early, before all the data hit the DRAM. This patch
ensures the data are written in the RAM before the DMA starts.
Please see the comment in the patch for full details.

This patch was produced with an amazing help from Albert Aribaud,
who pointed out it can possibly be such a bus synchronisation
issue.

Signed-off-by: Marek Vasut 
Cc: Albert ARIBAUD 
Cc: Fabio Estevam 
Cc: Stefano Babic 
Tested-by: Fabio Estevam 
Tested-by: Alexandre Pereira da Silva

net: fec: Remove bogus flush_dcache_range() call

2013-07-12T07:26:08+00:00

Remove incorrectly called and duplicate flush_dcache_range() call
from fec_mxc driver. The call is not needed, since the caches are
already flushed in fec_tbd_init(), moreover the second argument should
be the ending address, not size.

Signed-off-by: Marek Vasut 
Reported-by: Albert Aribaud 
Cc: Stefano Babic 
Cc: Tom Rini

phylib: add atheros ar803x phy

2013-06-25T00:11:17+00:00

add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher 
Cc: Andy Fleming 
Cc: Joe Hershberger

phylib: add natsemi dp83630 phy

2013-06-25T00:11:17+00:00

add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher 
Cc: Andy Fleming 
Cc: Joe Hershberger

net: update FTGMAC100 for MMU/D-cache support

2013-06-25T00:11:17+00:00

Signed-off-by: Kuo-Jung Su 
CC: Joe Hershberger 
CC: Tom Rini

net: add Faraday FTMAC110 10/100Mbps ethernet support

2013-06-25T00:11:16+00:00

Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:

(1) Tx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: O.K

(2) Rx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: Invalid!!!

Signed-off-by: Kuo-Jung Su 
Cc: Joe Hershberger 
Cc: Tom Rini