u-boot.git/drivers/net, branch v2013.07-rc2 Unnamed repository; edit this file 'description' to name the repository. phylib: add atheros ar803x phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:00+00:00 433a2c5325b982b49b099e526d373d07d0cc5e97 add atheros ar803x phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add atheros ar803x phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
phylib: add natsemi dp83630 phy 2013-06-25T00:11:17+00:00 Heiko Schocher hs@denx.de 2013-06-04T08:58:09+00:00 96d0b9e100cbe724d70e0aba18ad566542cc3e2e add natsemi dp83630 phy, used on the upcoming siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Andy Fleming <afleming@freescale.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> 
add natsemi dp83630 phy, used on the upcoming siemens boards.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
net: update FTGMAC100 for MMU/D-cache support 2013-06-25T00:11:17+00:00 Kuo-Jung Su dantesu@faraday-tech.com 2013-05-07T06:33:51+00:00 a8f9cd1893bef05b92f63242228607b45821c4a7 Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Joe Hershberger <joe.hershberger@gmail.com> CC: Tom Rini <trini@ti.com> 
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
CC: Joe Hershberger <joe.hershberger@gmail.com>
CC: Tom Rini <trini@ti.com>
net: add Faraday FTMAC110 10/100Mbps ethernet support 2013-06-25T00:11:16+00:00 Kuo-Jung Su dantesu@faraday-tech.com 2013-05-07T06:33:31+00:00 c4775476d211a4be027e45c14ef961de7312d5f6 Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux. However it has a weird DMA alignment issue: (1) Tx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: O.K (2) Rx DMA Buffer Address: 1 bytes aligned: Invalid 2 bytes aligned: O.K 4 bytes aligned: Invalid!!! Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Cc: Tom Rini <trini@ti.com> 
Faraday FTMAC110 10/100Mbps supports half-word data transfer for Linux.
However it has a weird DMA alignment issue:

(1) Tx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: O.K

(2) Rx DMA Buffer Address:
    1 bytes aligned: Invalid
    2 bytes aligned: O.K
    4 bytes aligned: Invalid!!!

Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
net: phy: supplement support for Micrel's KSZ9031 2013-06-25T00:11:16+00:00 SARTRE Leo lsartre@adeneo-embedded.com 2013-04-30T14:57:25+00:00 42a7cb50a96e95cdca26607727c6767876414ced Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com> 
Add function ksz9031_phy_extended_write and ksz9031_phy_extended_read

Signed-off-by: Leo Sartre <lsartre@adeneo-embedded.com>
net: macb: add support for gigabit MAC 2013-06-25T00:11:16+00:00 Bo Shen voice.shen@atmel.com 2013-04-24T07:59:28+00:00 d256be29f86b7c4e98435f7047a3e9c44dd7e0f4 Add gigabit MAC support in macb driver - using IP version to distinguish whether MAC is GMAC Signed-off-by: Bo Shen <voice.shen@atmel.com> 
Add gigabit MAC support in macb driver
  - using IP version to distinguish whether MAC is GMAC

Signed-off-by: Bo Shen <voice.shen@atmel.com>
net: macb: using phylib to configure phy device 2013-06-25T00:11:15+00:00 Bo Shen voice.shen@atmel.com 2013-04-24T07:59:27+00:00 b1a0006eba76ad72ba2cbaefc948dc7b511e8d2d using phylib to configure phy device in macb driver Signed-off-by: Bo Shen <voice.shen@atmel.com> 
using phylib to configure phy device in macb driver

Signed-off-by: Bo Shen <voice.shen@atmel.com>
net: macb: using AT91FAMILY replace #ifdeferry 2013-06-25T00:11:15+00:00 Bo Shen voice.shen@atmel.com 2013-04-24T07:59:26+00:00 d8f64b444191d9f3ea724317e6520643c48e3117 Using CONFIG_AT91FAMILY replace #ifdeferry for atmel SoC Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com> 
Using CONFIG_AT91FAMILY replace #ifdeferry for atmel SoC

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
net: ks8851_mll: add ethernet support 2013-06-25T00:11:14+00:00 Roberto Cerati roberto.cerati@bticino.it 2013-04-24T02:46:17+00:00 45a1693a312453dcb5d26cd03c57569c50872cc6 The device interface is 16 bits wide. All the available packets are read from the incoming fifo. Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it> Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> [voice.shen@atmel.com: address comments from review results] [voice.shen@atmel.com: clean up for submit] Signed-off-by: Bo Shen <voice.shen@atmel.com> Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it> 
The device interface is 16 bits wide.
All the available packets are read from the incoming fifo.

Signed-off-by: Roberto Cerati <roberto.cerati@bticino.it>
Signed-off-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
[voice.shen@atmel.com: address comments from review results]
[voice.shen@atmel.com: clean up for submit]
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Raffaele Recalcati <raffaele.recalcati@bticino.it>
phylib: Add Atheros AR8035 GETH PHY support 2013-06-25T00:11:14+00:00 Xie Xiaobo X.Xie@freescale.com 2013-04-10T08:23:39+00:00 6027384a69a7e671e810ae65b690dbfb25d5da81 Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> 
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>