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<title>u-boot.git/drivers/net, branch v2014.10-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/net?h=v2014.10-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/net?h=v2014.10-rc2'/>
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<updated>2014-08-30T11:46:39Z</updated>
<entry>
<title>arm: bcm281xx: net: Add Ethernet Driver</title>
<updated>2014-08-30T11:46:39Z</updated>
<author>
<name>Jiandong Zheng</name>
<email>jdzheng@broadcom.com</email>
</author>
<published>2014-08-02T03:37:16Z</published>
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<id>urn:sha1:799e125cca9f75a6e3bc87676266f8da4ebefcfd</id>
<content type='text'>
The Broadcom StarFighter2 Ethernet driver is used in multiple Broadcom
SoC(s) and:
- supports multiple MAC blocks,
- provides support for the Broadcom GMAC.
This driver requires MII and PHYLIB.

Signed-off-by: Jiandong Zheng &lt;jdzheng@broadcom.com&gt;
Signed-off-by: Steve Rae &lt;srae@broadcom.com&gt;
</content>
</entry>
<entry>
<title>net: cpsw: am335x: Drop constant link checking from rx/tx path's</title>
<updated>2014-08-28T21:18:49Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2014-08-25T09:26:19Z</published>
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<id>urn:sha1:5a834c1f9e8ba6995c24bb93da4e766af9374f5b</id>
<content type='text'>
We noticed on the DXR2 platform (AM335x with a SMSC LAN9303 switch connected
to the CPSW MAC) that the network performance in U-Boot is quite poor. Only
when the transfer is started without a cable connected, and the cable is
plugged after the first timeout "T" occured, an increased in performance
can be seen. Debugging has revealed, that the cpsw driver has constant
link checking builtin into the rx and tx functions. This results in the
bad performance and seems to be unnecessary. The link has already been
checked in the init function, before the transfer is started. This usually
is sufficient.

BTW: I have seen no other network driver in U-Boot so far, that constantly
checks for link in the rx / tx functions.

The performance numbers on the DXR2 board are:

0.56 MiB/s	cpsw_check_link() in rx and tx path
0.87 MiB/s	cpsw_check_link() only in tx path
1.0  MiB/s	cpsw_check_link() only in rx path
2.7  MiB/s	no cpsw_check_link() in rx and tx path

So with this patch the network performance on DXR2 increases from 0.56
to 2.7 MiB/s (nearly 5 times as fast).

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Samuel Egli &lt;samuel.egli@siemens.com&gt;
Tested-by: Heiko Schocher &lt;hs@denx.de&gt;
Cc: Vladimir Koutny &lt;vladimir.koutny@streamunlimited.com&gt;
Cc: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
Cc: Joe Hershberger &lt;joe.hershberger@gmail.com&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>e1000: add i210 support</title>
<updated>2014-08-21T16:01:28Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-08-08T14:41:39Z</published>
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<id>urn:sha1:951860634fdb557bbb58e0f99215391bc0c29779</id>
<content type='text'>
Add i210 support to the e1000 driver.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
</content>
</entry>
<entry>
<title>e1000: Implement dcache support</title>
<updated>2014-08-21T16:01:28Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-08-08T14:41:38Z</published>
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<id>urn:sha1:873e8e0198a204e63b4e44094e36e81df94513f3</id>
<content type='text'>
Implement proper support for cache flushing and invalidation into the
Intel e1000 NIC driver.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: remove dead drivers</title>
<updated>2014-08-21T16:01:11Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-08-03T23:11:37Z</published>
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<id>urn:sha1:368b4d2b49bbbf379d9334747fbbd2aaaafe4356</id>
<content type='text'>
The following configs are not defined at all:

 - CONFIG_INCA_IP_SWITCH
 - CONFIG_PBL2800_ETHER
 - CONFIG_PHY_ICPLUS

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>powerpc/T4240QDS/eth: some fix for XFI</title>
<updated>2014-08-20T17:44:16Z</updated>
<author>
<name>Shaohui Xie</name>
<email>Shaohui.Xie@freescale.com</email>
</author>
<published>2014-08-13T10:19:15Z</published>
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<id>urn:sha1:9bf499ace8dd0d4b9c092081425696c150ffc563</id>
<content type='text'>
XFI is supported on T4QDS-XFI board, which removed slot3, and four LANEs
of serdes2 are routed to a SFP+ cages, which to house fiber cable or
direct attach cable(copper), the copper cable is used to emulate the
10GBASE-KR scenario.

So, for XFI usage, there are two scenarios, one will use fiber cable,
another will use copper cable. For fiber cable, there is NO PHY, while
for copper cable, we need to use internal PHY which exist in Serdes to
do auto-negotiation and link training, which implemented in kernel.
We use hwconfig to define cable type for XFI, and fixup dtb based on the
cable type.

For copper cable, set below env in hwconfig:

fsl_10gkr_copper:&lt;10g_mac_name&gt;

the &lt;10g_mac_name&gt; can be fm1_10g1, fm1_10g2, fm2_10g1, fm2_10g2. The
four &lt;10g_mac_name&gt;s do not have to be coexist in hwconfig. For XFI ports,
if a given 10G port will use the copper cable for 10GBASE-KR, set the
&lt;10g_mac_name&gt; of the port in hwconfig, otherwise, fiber cable will be
assumed to be used for the port.

For ex. if four XFI ports will both use copper cable, the hwconfig
should contain:

fsl_10gkr_copper:fm1_10g1,fm1_10g2,fm2_10g1,fm2_10g2

For fiber cable:

1. give PHY address to a XFI port, otherwise, the XFI ports will not be
available in U-boot, there is no PHY physically for XFI when using fiber
cable, this is just to make U-boot happy and we can use the XFI ports
in U-boot.
2. fixup dtb to use fixed-link in case of fiber cable which has no PHY.
Kernel requests that a MAC must have a PHY or fixed-link.

When using XFI protocol, the MAC 9/10 on FM1 should init as 10G interface.

Change serdes 2 protocol 56 to 55 which has same feature as 56 since 56
is not valid any longer.

Signed-off-by: Shaohui Xie &lt;Shaohui.Xie@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>vitesse: remove duplicated argument to ||</title>
<updated>2014-08-09T15:17:02Z</updated>
<author>
<name>maxin.john@enea.com</name>
<email>maxin.john@enea.com</email>
</author>
<published>2014-07-24T10:26:05Z</published>
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<id>urn:sha1:79e86ccb3786c8b20004db3fa10a70049456f580</id>
<content type='text'>
Remove the duplicated argument to || check

Signed-off-by: Maxin B. John &lt;maxin.john@enea.com&gt;
</content>
</entry>
<entry>
<title>Change Andy Fleming's email address</title>
<updated>2014-08-06T13:12:30Z</updated>
<author>
<name>Andy Fleming</name>
<email>afleming@gmail.com</email>
</author>
<published>2014-07-25T22:39:08Z</published>
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<id>urn:sha1:b21f87a3e02461c600f1c172b053f1530a532d90</id>
<content type='text'>
Messages to afleming@freescale.com now bounce, and should be
directed to my personal address at afleming@gmail.com

Signed-off-by: Andy Fleming &lt;afleming@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-arm</title>
<updated>2014-07-29T13:41:35Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-07-29T13:41:35Z</published>
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<id>urn:sha1:362f16b1e9e94024a511adae9977d145ef942b50</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2014-07-28T18:54:29Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2014-07-28T18:54:29Z</published>
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<id>urn:sha1:d5f8a6ddd41dee0de17888f8b5334fe1b636c4ca</id>
<content type='text'>
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