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<title>u-boot.git/drivers/net, branch v2016.07-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>nand: Embed mtd_info in struct nand_chip</title>
<updated>2016-06-04T01:27:48+00:00</updated>
<author>
<name>Scott Wood</name>
<email>oss@buserror.net</email>
</author>
<published>2016-05-30T18:57:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b616d9b0a708eb90eb474e1b6ec6dfe4c48a1678'/>
<id>b616d9b0a708eb90eb474e1b6ec6dfe4c48a1678</id>
<content type='text'>
nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
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<pre>
nand_info[] is now an array of pointers, with the actual mtd_info
instance embedded in struct nand_chip.

This is in preparation for syncing the NAND code with Linux 4.6,
which makes the same change to struct nand_chip.  It's in a separate
commit due to the large amount of changes required to accommodate the
change to nand_info[].

Signed-off-by: Scott Wood &lt;oss@buserror.net&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: Add ag7xxx driver for Atheros MIPS</title>
<updated>2016-05-31T07:38:11+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2016-05-24T21:29:09+00:00</published>
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<id>e40095f63b4bc0edd747c7f104d3e54db61e7d3d</id>
<content type='text'>
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Wills Wang &lt;wills.wang@live.com&gt;
[fixed Kconfig dependency]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
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<pre>
Add ethernet driver for the AR933x and AR934x Atheros MIPS machines.
The driver could be easily extended to other WiSoCs.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Wills Wang &lt;wills.wang@live.com&gt;
[fixed Kconfig dependency]
Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: pcnet: Fix init on big endian 64 bit</title>
<updated>2016-05-31T07:38:11+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-05-26T16:32:29+00:00</published>
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<id>bed1ca322da9b597aa59723a02a1dd647bf8bde4</id>
<content type='text'>
If dev-&gt;iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<pre>
If dev-&gt;iobase is 64 bits wide then writing the value of the BAR into a
pointer to iobase will not work on big endian systems, where the BAR
value will incorrectly get written to the upper 32 bits of the 64 bit
variable. Fix this by reading the BAR into a u32, matching the type
expected by pci_read_config_dword.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: pcnet: Make 64 bit safe</title>
<updated>2016-05-31T07:38:11+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-05-26T13:49:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=442d2e0149c4f3f2dadcf6ebc28b58d317fc5aa0'/>
<id>442d2e0149c4f3f2dadcf6ebc28b58d317fc5aa0</id>
<content type='text'>
Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
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<pre>
Fix the pcnet driver to build safely on 64 bit platforms, in preparation
for allowing MIPS64 builds for Malta boards.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: pcnet: Stop converting kseg1-&gt;kseg0 addresses</title>
<updated>2016-05-31T07:38:11+00:00</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2016-05-26T13:49:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4677d665a7cba420597dd46606735f86416ce552'/>
<id>4677d665a7cba420597dd46606735f86416ce552</id>
<content type='text'>
Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
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<pre>
Now that MIPS virt_to_phys can handle kseg1 addresses on MIPS32, stop
manually converting addresses to their kseg0 equivalents in the pcnet
driver.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-rockchip</title>
<updated>2016-05-27T19:48:53+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-27T19:48:53+00:00</published>
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<id>378f9134eba4665ea94a63653393d25418665fda</id>
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<pre>
</pre>
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</entry>
<entry>
<title>net: designware: fix descriptor layout and warnings on 64-bit archs</title>
<updated>2016-05-27T19:39:46+00:00</updated>
<author>
<name>Beniamino Galvani</name>
<email>b.galvani@gmail.com</email>
</author>
<published>2016-05-08T06:30:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0e1a3e30deb089cba3f1c01a48443cf8a86b5398'/>
<id>0e1a3e30deb089cba3f1c01a48443cf8a86b5398</id>
<content type='text'>
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Use phys_addr_t not unsigned long long to test that we're within
DMA'able memory]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<pre>
All members of the DMA descriptor must be 32-bit, even on 64-bit
architectures: change the type to u32 to ensure this. Also, fix
other warnings.

Signed-off-by: Beniamino Galvani &lt;b.galvani@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Use phys_addr_t not unsigned long long to test that we're within
DMA'able memory]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: designware: support phy reset device-tree bindings</title>
<updated>2016-05-27T15:00:48+00:00</updated>
<author>
<name>Sjoerd Simons</name>
<email>sjoerd.simons@collabora.co.uk</email>
</author>
<published>2016-02-28T21:24:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=90b7fc924adfe7f1745dcf6a1dabb9e77aa762a7'/>
<id>90b7fc924adfe7f1745dcf6a1dabb9e77aa762a7</id>
<content type='text'>
Add support for the snps,reset-gpio, snps,reset-active-low (optional) and
snps,reset-delays-us device-tree bindings. The combination of these
three define how the PHY should be reset to ensure it's in a sane state.

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Add support for the snps,reset-gpio, snps,reset-active-low (optional) and
snps,reset-delays-us device-tree bindings. The combination of these
three define how the PHY should be reset to ensure it's in a sane state.

Signed-off-by: Sjoerd Simons &lt;sjoerd.simons@collabora.co.uk&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2016-05-25T11:19:31+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-05-25T11:19:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=826d06dbdd0e29ab0d8bd76d1ca640e2dfdb076c'/>
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<pre>
</pre>
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</entry>
<entry>
<title>powerpc:t4240: MAC9 and MAC10 should not be identified as 1G interface in some case</title>
<updated>2016-05-25T00:11:03+00:00</updated>
<author>
<name>Ying Zhang</name>
<email>b40530@freescale.com</email>
</author>
<published>2016-04-18T09:04:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8ef548d5f13e68e1b3975d9b68920bfa8bf09891'/>
<id>8ef548d5f13e68e1b3975d9b68920bfa8bf09891</id>
<content type='text'>
When using rcw protocols to support 10G on MAC9 and MAC10, these MACs
should not be identified as 1G interface, otherwise, one MAC will be
listed as two Ethernet ports. For example, MAC9 will be listed as
FM1@TGEC1 and FM1@DTSEC9.

Signed-off-by: Ying Zhang &lt;b40530@freescale.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
When using rcw protocols to support 10G on MAC9 and MAC10, these MACs
should not be identified as 1G interface, otherwise, one MAC will be
listed as two Ethernet ports. For example, MAC9 will be listed as
FM1@TGEC1 and FM1@DTSEC9.

Signed-off-by: Ying Zhang &lt;b40530@freescale.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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