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<title>u-boot.git/drivers/net, branch v2016.11-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge git://git.denx.de/u-boot-fdt</title>
<updated>2016-10-14T00:03:33+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2016-10-14T00:03:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4504062b271bf4d1cf256e4e87e156de6029e088'/>
<id>4504062b271bf4d1cf256e4e87e156de6029e088</id>
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<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>libfdt: Sync fdt_for_each_subnode() with upstream</title>
<updated>2016-10-13T20:10:32+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-10-02T23:59:29+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df87e6b1b815ae3484ea2aa7c53b90af382eae1b'/>
<id>df87e6b1b815ae3484ea2aa7c53b90af382eae1b</id>
<content type='text'>
The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Update to drivers/power/pmic/palmas.c:
Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;

Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
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<pre>
The signature for this macro has changed. Bring in the upstream version and
adjust U-Boot's usages to suit.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Update to drivers/power/pmic/palmas.c:
Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;

Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
</pre>
</div>
</content>
</entry>
<entry>
<title>libfdt: Bring in upstream stringlist functions</title>
<updated>2016-10-13T19:54:10+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-10-02T23:59:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b02e4044ff8ee1f6ac83917a39514172a9b449fb'/>
<id>b02e4044ff8ee1f6ac83917a39514172a9b449fb</id>
<content type='text'>
These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.

This applies the following upstream commits by
Thierry Reding &lt;treding@nvidia.com&gt; :

   604e61e fdt: Add functions to retrieve strings
   8702bd1 fdt: Add a function to get the index of a string
   2218387 fdt: Add a function to count strings

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
These have now landed upstream. The naming is different and in one case the
function signature has changed. Update the code to match.

This applies the following upstream commits by
Thierry Reding &lt;treding@nvidia.com&gt; :

   604e61e fdt: Add functions to retrieve strings
   8702bd1 fdt: Add a function to get the index of a string
   2218387 fdt: Add a function to count strings

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rtl8169: fix cache misalignment message on transmit.</title>
<updated>2016-10-13T17:25:29+00:00</updated>
<author>
<name>Peter Chubb</name>
<email>Peter.Chubb@data61.csiro.au</email>
</author>
<published>2016-09-14T01:29:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7377647a3678c50c1913f05d8ad8d685b05e52d1'/>
<id>7377647a3678c50c1913f05d8ad8d685b05e52d1</id>
<content type='text'>
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb &lt;peter.chubb@data61.csiro.au&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The call to flush cache on the transmit buffer was misplaced (for very
short packets) and asked to flush less than a cacheline.

Move the flush cache call to after a short packet has been padded
to minimum length (so the padding is flushed too), and round the size
up to a cacheline.

Signed-off-by: Peter Chubb &lt;peter.chubb@data61.csiro.au&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: mvneta: fix typo in comment</title>
<updated>2016-10-13T17:25:21+00:00</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2016-08-29T08:54:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6723b235520190bdc774760126fc063ec794c37f'/>
<id>6723b235520190bdc774760126fc063ec794c37f</id>
<content type='text'>
Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: mv88e61xx: Add support for fixed links</title>
<updated>2016-10-13T17:25:18+00:00</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2016-08-26T05:30:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b755abecd45d6c5e1589ec4b17b6189a9dcbdac0'/>
<id>b755abecd45d6c5e1589ec4b17b6189a9dcbdac0</id>
<content type='text'>
On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
On some boards these switches are wired directly into a SERDES
interface on another Ethernet MAC. Add the ability to specify
these kinds of boards using CONFIG_MV88E61XX_FIXED_PORTS which defines
a bit mask of these fixed ports.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: Add support for mv88e609x switches</title>
<updated>2016-10-13T17:25:14+00:00</updated>
<author>
<name>Chris Packham</name>
<email>judge.packham@gmail.com</email>
</author>
<published>2016-08-26T05:30:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=65d4d00abc9166c0f837e9ca08b2d4453241e68c'/>
<id>65d4d00abc9166c0f837e9ca08b2d4453241e68c</id>
<content type='text'>
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.

The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().

Other than that it's just a matter of adding the appropriate chip
IDs.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Cc: Joshua Scott &lt;joshua.scott@alliedtelesis.co.nz&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Marvell Link Street mv88e60xx is a series of FastEthernet switch
chips, some of which also support Gigabit ports. It is similar to the
mv88e61xx series which support Gigabit on all ports.

The main difference is the number of ports. Which affects the
PORT_COUNT define and the size of the mask passed to
mv88e61xx_port_set_vlan().

Other than that it's just a matter of adding the appropriate chip
IDs.

Signed-off-by: Chris Packham &lt;judge.packham@gmail.com&gt;
Cc: Joshua Scott &lt;joshua.scott@alliedtelesis.co.nz&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>driver: net: cpsw: add support for RGMII id mode support and RMII clock source selection</title>
<updated>2016-10-13T17:25:02+00:00</updated>
<author>
<name>Mugunthan V N</name>
<email>mugunthanvnm@ti.com</email>
</author>
<published>2016-10-13T14:03:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ab9715303d0b32e9a71dfa9c43d6629f54e2f236'/>
<id>ab9715303d0b32e9a71dfa9c43d6629f54e2f236</id>
<content type='text'>
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.

Signed-off-by: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
cpsw driver supports only selection of phy mode in control module
but control module has more setting like RGMII ID mode selection,
RMII clock source selection. So ported to cpsw-phy-sel driver
from kernel to u-boot.

Signed-off-by: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
Signed-off-by: Lokesh Vutla &lt;lokeshvutla@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: phy: atheros: add separate config for AR8031</title>
<updated>2016-10-13T17:24:55+00:00</updated>
<author>
<name>Mugunthan V N</name>
<email>mugunthanvnm@ti.com</email>
</author>
<published>2016-10-13T14:03:36+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ce412b79e72557702185443501478646a938b5fe'/>
<id>ce412b79e72557702185443501478646a938b5fe</id>
<content type='text'>
In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.

Reviewed-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Signed-off-by: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
In the current driver implementation, config() callback is common
for AR8035 and AR8031 phy. In config() callback, driver tries to
configure MMD Access Control Register and MMD Access Address Data
Register unconditionally for both phy versions which leads to
auto negotiation failure in AM335x EVMsk second port which uses
AR8031 Giga bit RGMII phy. Fixing this by adding separate config
for AR8031 phy.

Reviewed-by: Sekhar Nori &lt;nsekhar@ti.com&gt;
Signed-off-by: Mugunthan V N &lt;mugunthanvnm@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: atheros: add support for RGMII_ID, RGMII_TXID and RGMII_RXID</title>
<updated>2016-10-13T17:24:51+00:00</updated>
<author>
<name>Andrea Merello</name>
<email>andrea.merello@gmail.com</email>
</author>
<published>2016-05-26T16:24:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2ec4d10b65d1f7d45098606e9a6857d587c3027c'/>
<id>2ec4d10b65d1f7d45098606e9a6857d587c3027c</id>
<content type='text'>
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello &lt;andrea.merello@gmail.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds support for internal delay on RX and TX on RGMII interface for the
AR8035 phy.

This is basically the same Linux driver do. Tested on a Zynq Zturn board (for
which u-boot support in is my tree; first patch waiting ML approval)

Signed-off-by: Andrea Merello &lt;andrea.merello@gmail.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
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