u-boot.git/drivers/net, branch v2018.11

powerpc: t1040: Correct RCW EC2 settings

2018-10-29T20:19:43+00:00

Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2
settings.

- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should
  be 0x04000000 (value of 1 in RCW bit [420:421])
- Value of 2/3 are reserved in RCW bit [420:421], hence there is no
  macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.

Signed-off-by: Bin Meng 
Acked-by: Poonam Aggrwal 
Reviewed-by: York Sun

drivers: cosmetic: Convert SPDX license tags to Linux Kernel style

2018-10-28T13:26:39+00:00

Complete in the drivers directory the work started with
commit 83d290c56fab ("SPDX: Convert all of our single
license tags to Linux Kernel style").

Reviewed-by: Simon Glass 
Signed-off-by: Patrick Delaunay

net: fec_mxc: add support for i.MX8X

2018-10-24T19:45:38+00:00

Add compatible property and enable the FEC ipg clock when probing
on i.MX8X. Add specific function for reading FEC clock rate via
clock driver when configuring MII speed register. Allow FEC_MXC
selection for i.MX8.

Signed-off-by: Anatolij Gustschin 
Cc: Joe Hershberger 
Acked-by: Joe Hershberger

net: mvpp2: increase PHY reset pulse

2018-10-24T19:45:38+00:00

The default Linux PHY reset delay is 10ms. This is also the requirement
for Marvell 88E151x PHYs, which are likely to be used with this Ethernet
MAC.

Cc: Stefan Chulski 
Signed-off-by: Baruch Siach 
Acked-by: Joe Hershberger 
Reviewed-by: Stefan Roese

net: mvpp2: fix polarity of PHY reset signal

2018-10-24T19:45:38+00:00

The dm_gpio_set_value() call sets the logical level of the GPIO signal.
That is, it takes the GPIO_ACTIVE_{LOW,HIGH} property into account. The
driver needs to assert the reset, and then deassert it. Not the other
way around.

Cc: Stefan Chulski 
Signed-off-by: Baruch Siach 
Acked-by: Joe Hershberger 
Reviewed-by: Stefan Roese

net: dm: fec: Obtain the transceiver type from the DT

2018-10-24T19:45:37+00:00

The DT property "phy-mode" already provides the transceiver type.
Use it so that we do not have to also set CONFIG_FEC_XCV_TYPE

Signed-off-by: Martin Fuzzey 
Acked-by: Joe Hershberger

net: dm: fec: Support the phy-supply binding

2018-10-24T19:45:37+00:00

Configure the phy regulator if defined by the "phy-supply" DT phandle.

Signed-off-by: Martin Fuzzey 
Acked-by: Joe Hershberger

net: dm: fec: Fix phy-reset-duration clamping and defaults

2018-10-24T19:45:37+00:00

The DT binding says:
- phy-reset-duration : Reset duration in milliseconds.  Should present
  only if property "phy-reset-gpios" is available.  Missing the property
  will have the duration be 1 millisecond.  Numbers greater than 1000 are
  invalid and 1 millisecond will be used instead.

However the current code:
 - clamps values greater than 1000ms to 1000ms rather than 1.
 - does not initialize the delay if the property does not exist
   (else clause mismatch)
 - returns an error if phy-reset-gpios is not defined

Fix all this and simplify by using dev_read_u32_default()

Signed-off-by: Martin Fuzzey 
Acked-by: Joe Hershberger

net: dm: fec: Fix time unit error in phy-reset-duration

2018-10-24T19:45:37+00:00

The DT binding says that phy-reset-duration is in ms, but the driver
currently uses udelay().

Switch to mdelay() to fix this.

Signed-off-by: Martin Fuzzey 
Reviewed-by: Michael Trimarchi 
Acked-by: Joe Hershberger

net: phy: aquantia: autodetect if firmware needs to be loaded

2018-10-24T19:45:37+00:00

If the phy reports a valid firmware version and doesn't indicate
a fault, skip loading the firmware.  This allows the same image
to be used on boards that have firmware storage and those that do not.

Signed-off-by: Jeremy Gebben 
Acked-by: Joe Hershberger