u-boot.git/drivers/net, branch v2019.04-rc3

net: macb: Fix GEM hardware detection

2019-02-27T01:12:33Z

Fix MID bit field check to correctly identify all GEM hardwares. The check is updated as per macb driver in Linux location: /drivers/net/ethernet/cadence/macb_main.c:259 Signed-off-by: Atish Patra Signed-off-by: Anup Patel Reviewed-by: Alexander Graf Reviewed-by: Lukas Auer Acked-by: Joe Hershberger

net: macb: Fix clk API usage for RISC-V systems

2019-02-27T01:12:33Z

Don't fail in macb_enable_clk() if clk_enable() returns -ENOSYS because we get -ENOSYS for fixed-rate clocks. Signed-off-by: Anup Patel Reviewed-by: Bin Meng

arm: socfpga: gen5 enable designware_socfpga

2019-02-18T12:00:53Z

Enable the socfpga specific designware ethernet driver by default for socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a MACH_SOCFPGA config. This is required to remove the hacky reset and phy mode handling in arch/arm/mach-socfpga. Signed-off-by: Simon Goldschmidt

net: designware: socfpga: adapt to Gen5

2019-02-18T12:00:53Z

This driver was written for Arria10, but it applies to Gen5, too. The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the syscon bits are encoded in the same register, thus an offset is needed. This offset is already read from the devicetree, but for Arria10 it is always 0, which is probably why it has been ignored. By using this offset when writing the phy mode into the syscon regiter, we can use this driver to set the phy mode for both of the MACs on Gen5. Since the PHY mode bits in sysmgr are the same even for Stratix10, let's drop the detection of the sub-mach by checking compatible version and just use the same code for all FPGAs. To work correctly, this driver depends on SYSCON and REGMAP, so select those via Kconfig when it is enabeld. Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift offset is required). Signed-off-by: Simon Goldschmidt

net: mv88e61xx: fix autonegotiation on ports

2019-02-15T12:01:28Z

phy_reset should be called before autoneg is setup The only boards using MV88E61XX_SWITCH are: - alliedtelesis/SBx81LIFKW - alliedtelesis/SBx81LIFXCAT - gateworks/gw_ventana Cc: Chris Packham Signed-off-by: Tim Harvey Reviewed-by: Chris Packham

net: dm: fec: Fix regulator enable when using DM_REGULATOR

2019-02-15T11:41:12Z

When DM_REGULATOR is enabled, the driver attempts to call regulator_autoset() which expects the regulators to be on at boot and/or always on and fails if they are not true. For a more generic approach, this patch just calls regulator_set_enable() which shouldn't have such restrictions. Fixes: ad8c43cbcafb ("net: dm: fec: Support the phy-supply binding") Signed-off-by: Adam Ford Tested-by: Martin Fuzzey Acked-by: Joe Hershberger

net: Add MSCC Luton networkd driver.

2019-02-01T13:13:36Z

Add network driver for Microsemi Ethernet switch, it is present on Luton SoCs. Signed-off-by: Horatiu Vultur

net: mscc: Remove unused variables

2019-02-01T13:13:36Z

Remove unused variables in the struct ocelot_private and make miim variable static. Signed-off-by: Horatiu Vultur

net: mscc: Move mac_table_add function into different file.

2019-02-01T13:13:36Z

Move the function mac_table_add into a different file, so it can be reused. Signed-off-by: Horatiu Vultur

net: mscc: Move ocelot_send and ocelot_recv in a different file.

2019-02-01T13:13:36Z

This functions can be reused by other MSCC SoCs therefore, make them more generic and move them in separate files. Signed-off-by: Horatiu Vultur