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<title>u-boot.git/drivers/net, branch v2020.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>drivers: net: bcm-sf2: pass -1 to phy_connect()</title>
<updated>2019-12-20T16:02:23+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-12-19T12:35:37+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1785d8c3a5f396f7f81f029d8828908229bff87e'/>
<id>1785d8c3a5f396f7f81f029d8828908229bff87e</id>
<content type='text'>
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime.  It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Cc: Jiandong Zheng &lt;jdzheng@broadcom.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime.  It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Cc: Jiandong Zheng &lt;jdzheng@broadcom.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: dwc_eth_qos: Pass -1 to phy_connect() to scan for all PHYs</title>
<updated>2019-12-20T16:02:12+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2019-12-18T06:48:50+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a9447c022de81b3e1842ae3d9af56fdf94952f26'/>
<id>a9447c022de81b3e1842ae3d9af56fdf94952f26</id>
<content type='text'>
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to
phy_connect(). Passing 0 used to work before be accident, but does no
longer.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Cc: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
PHY address 0 is a valid PHY address, to scan for all PHYs, pass -1 to
phy_connect(). Passing 0 used to work before be accident, but does no
longer.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Cc: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Cc: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Reviewed-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: am65-cpsw-nuss: Add new compatible for J721e</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-12-04T16:47:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=382c0c629e75b6213b638f734db468e23ca4cff3'/>
<id>382c0c629e75b6213b638f734db468e23ca4cff3</id>
<content type='text'>
Add new compatible to handle J721e SoC

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Add new compatible to handle J721e SoC

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ti: am65-cpsw-nuss: Rework RX flow ID handling</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2019-12-04T16:47:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=461a290c5afbbb00dcbd671bedcad13abea9b37a'/>
<id>461a290c5afbbb00dcbd671bedcad13abea9b37a</id>
<content type='text'>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
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<pre>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Reviewed-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: ftgmac100: align RX/TX descriptors on ARCH_DMA_MINALIGN</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2019-11-28T12:37:04+00:00</published>
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<id>08b3e90a0168c9053c9bdd7df5d187cb6668a4c6</id>
<content type='text'>
Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays")
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Fixes: e766849713ff ("net: ftgmac100: convert the RX/TX descriptor arrays")
Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: fsl_enetc: register internal MDIO bus</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-11-25T15:57:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e354cb3931472c6e88aa6c46d4bda9beddfdcc4'/>
<id>1e354cb3931472c6e88aa6c46d4bda9beddfdcc4</id>
<content type='text'>
This bus is used to access internal SoC PHYs.  These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
This bus is used to access internal SoC PHYs.  These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: fsl_enetc_mdio: return with time-out if HW is stuck</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-11-14T16:58:47+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6c9644685940e1d98c2d38fb205e8da14f3690b5'/>
<id>6c9644685940e1d98c2d38fb205e8da14f3690b5</id>
<content type='text'>
On some boards MDIO may get stuck if it detects echo on the line.  This is
a know hardware issue, there is a board fix for it.  In case we're running
on a board that doesn't have the fix, we don't want to loop here forever
and freeze U-Boot.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
On some boards MDIO may get stuck if it detects echo on the line.  This is
a know hardware issue, there is a board fix for it.  In case we're running
on a board that doesn't have the fix, we don't want to loop here forever
and freeze U-Boot.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: fsl_enetc: move PCS and PHY config to probe</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-11-14T16:58:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a931f78307300070e3a6cb95958f7dcc5fce3bb6'/>
<id>a931f78307300070e3a6cb95958f7dcc5fce3bb6</id>
<content type='text'>
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used.  Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used.  Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: fsl_enetc: Add 2.5Gbps to supported link speeds</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-11-14T16:58:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=307f8a6d1f034fc23aa7a42fa121f7fa011a33e4'/>
<id>307f8a6d1f034fc23aa7a42fa121f7fa011a33e4</id>
<content type='text'>
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: fsl_enetc: use the new MDIO DM helper functions</title>
<updated>2019-12-09T15:47:43+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2019-11-25T15:15:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=17bd7eae72fed240ff806c14b53fd6ff281ee311'/>
<id>17bd7eae72fed240ff806c14b53fd6ff281ee311</id>
<content type='text'>
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
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<pre>
Uses the new dm_eth_phy_connect helper to connect to the PHY to simplify
the code.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</pre>
</div>
</content>
</entry>
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