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<title>u-boot.git/drivers/net, branch v2021.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>net: cortina_ni: buffer overrun</title>
<updated>2021-02-24T21:51:49+00:00</updated>
<author>
<name>Heinrich Schuchardt</name>
<email>xypron.glpk@gmx.de</email>
</author>
<published>2021-02-20T09:44:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=df88a0e5cd7dfc62921fd0ee3e79c47c2953b2a5'/>
<id>df88a0e5cd7dfc62921fd0ee3e79c47c2953b2a5</id>
<content type='text'>
When copying to a u32 field we should use sizeof(u32) and not
sizeof(*u32) in memcpy.

On 64bit systems like cortina_presidio-asic-emmc_defconfig using
sizeof(*u32) leads to a buffer overrun.

Fixes: febe13b438b3 ("net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs")
Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-By: Ramon Fried &lt;rfried.dev@gmail.com&gt;
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<pre>
When copying to a u32 field we should use sizeof(u32) and not
sizeof(*u32) in memcpy.

On 64bit systems like cortina_presidio-asic-emmc_defconfig using
sizeof(*u32) leads to a buffer overrun.

Fixes: febe13b438b3 ("net: cortina_ni: Add eth support for Cortina Access CAxxxx SoCs")
Signed-off-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
Reviewed-By: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2021-02-23T15:45:55+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-02-23T15:45:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cbe607b920bc0827d8fe379ed4f5ae4e2058513e'/>
<id>cbe607b920bc0827d8fe379ed4f5ae4e2058513e</id>
<content type='text'>
Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
</content>
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<pre>
Xilinx changes for v2021.04-rc3

qspi:
- Support for dual/quad mode
- Fix speed handling

clk:
- Add clock enable function for zynq/zynqmp/versal

gem:
- Enable clock for Versal
- Fix error path
- Fix mdio deregistration path

fpga:
- Fix buffer alignment for ZynqMP

xilinx:
- Fix reset reason clearing in ZynqMP
- Show silicon version in SPL for Zynq/ZynqMP
- Fix DTB selection for ZynqMP
- Rename zc1275 to zcu1275 to match DT name
</pre>
</div>
</content>
</entry>
<entry>
<title>net: gem: Fix error path in zynq_gem_probe</title>
<updated>2021-02-23T13:56:59+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-02-11T18:03:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a13a82186e93c2e6e8533b8f06679091dc430062'/>
<id>a13a82186e93c2e6e8533b8f06679091dc430062</id>
<content type='text'>
Clean up error path in connection where priv-&gt;rxbuffers and priv-&gt;tx_bd are
allocated.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
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<pre>
Clean up error path in connection where priv-&gt;rxbuffers and priv-&gt;tx_bd are
allocated.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: gem: Enable ethernet rx clock for versal</title>
<updated>2021-02-23T13:56:59+00:00</updated>
<author>
<name>T Karthik Reddy</name>
<email>t.karthik.reddy@xilinx.com</email>
</author>
<published>2021-02-03T10:10:48+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ea4d4cb39a1bbe3bb94bff6b70367b3cb722b007'/>
<id>ea4d4cb39a1bbe3bb94bff6b70367b3cb722b007</id>
<content type='text'>
Enable rx clock along with tx clock for versal platform. Use compatible
data to enable/disable clocks in the driver.

Signed-off-by: T Karthik Reddy &lt;t.karthik.reddy@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</content>
<content type='xhtml'>
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<pre>
Enable rx clock along with tx clock for versal platform. Use compatible
data to enable/disable clocks in the driver.

Signed-off-by: T Karthik Reddy &lt;t.karthik.reddy@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Ramon Fried &lt;rfried.dev@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>clk: zynq: Add dummy clock enable function</title>
<updated>2021-02-23T13:56:59+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2021-02-09T14:28:15+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9b7aac75365b68bae2e8f7cf074ba95638d31882'/>
<id>9b7aac75365b68bae2e8f7cf074ba95638d31882</id>
<content type='text'>
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function").

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
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<pre>
A lot of Xilinx drivers are checking -ENOSYS which means that clock driver
doesn't have enable function. Remove this checking from drivers and create
dummy enable function as was done for clk_fixed_rate driver by
commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function").

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>uec.h: fix COFIG_DM typo</title>
<updated>2021-02-21T23:46:41+00:00</updated>
<author>
<name>Rasmus Villemoes</name>
<email>rasmus.villemoes@prevas.dk</email>
</author>
<published>2020-10-05T13:15:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=44a7cc82b39b251af3e068cd6827bb35c5d71472'/>
<id>44a7cc82b39b251af3e068cd6827bb35c5d71472</id>
<content type='text'>
Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
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<pre>
Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm_qe_uec.c: fix indentation in uec_set_mac_if_mode()</title>
<updated>2021-02-21T23:46:41+00:00</updated>
<author>
<name>Rasmus Villemoes</name>
<email>rasmus.villemoes@prevas.dk</email>
</author>
<published>2020-10-05T13:15:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=69bd7dfc3afe118ce2af10c643dc12bfb26c0343'/>
<id>69bd7dfc3afe118ce2af10c643dc12bfb26c0343</id>
<content type='text'>
Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Signed-off-by: Rasmus Villemoes &lt;rasmus.villemoes@prevas.dk&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: net: Add Felix DSA switch driver</title>
<updated>2021-02-16T17:38:36+00:00</updated>
<author>
<name>Alex Marginean</name>
<email>alexandru.marginean@nxp.com</email>
</author>
<published>2021-01-25T12:23:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=71a2d1e7b855812c4a9e83e37d643631efb3c57f'/>
<id>71a2d1e7b855812c4a9e83e37d643631efb3c57f</id>
<content type='text'>
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
</content>
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<pre>
This driver is used for the Ethernet switch integrated into LS1028A NXP.
Felix on LS1028A has 4 front panel ports and two internal ports, I/O
to/from the switch is done through an ENETC Ethernet interface.
The 4 front panel ports are available as Ethernet interfaces and can be
used with the typical network commands like tftp.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: Introduce DSA class for Ethernet switches</title>
<updated>2021-02-16T16:48:20+00:00</updated>
<author>
<name>Claudiu Manoil</name>
<email>claudiu.manoil@nxp.com</email>
</author>
<published>2021-01-25T12:23:53+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fc054d563bfb676f808f26204dfe17c690eed1ba'/>
<id>fc054d563bfb676f808f26204dfe17c690eed1ba</id>
<content type='text'>
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
DSA stands for Distributed Switch Architecture and it covers switches that
are connected to the CPU through an Ethernet link and generally use frame
tags to pass information about the source/destination ports to/from CPU.
Front panel ports are presented as regular ethernet devices in U-Boot and
they are expected to support the typical networking commands.
DSA switches may be cascaded, DSA class code does not currently support
this.

Signed-off-by: Alex Marginean &lt;alexandru.marginean@nxp.com&gt;
Signed-off-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>net: phy: introduce fixed_phy_create for DSA CPU ports</title>
<updated>2021-02-16T16:48:20+00:00</updated>
<author>
<name>Vladimir Oltean</name>
<email>vladimir.oltean@nxp.com</email>
</author>
<published>2021-01-25T12:23:52+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0781c95bc448a211546404c779e78b29ada1214'/>
<id>d0781c95bc448a211546404c779e78b29ada1214</id>
<content type='text'>
The DSA (Distributed Switch Architecture) implementation has made a
design decision when it got introduced to the Linux kernel in 2008.
That was to hide away from the user the CPU-facing Ethernet MAC, since
it does not make sense to register it as a struct net_device (UCLASS_ETH
udevice for U-Boot), because that would never be beneficial for a user:
they would not be able to use it for traffic, since conceptually, a
packet delivered to the CPU port should loop back into the system.

Nonetheless, DSA has had numerous growing pains due to the lack of a
struct net_device for the CPU port, but so far it has overcome them.
It is unlikely at this stage of maturity that this aspect of it will
change.

We would like U-Boot to present the same information as Linux, to be at
parity in terms of number of interfaces, so that ethNaddr environment
variables could directly be associated between U-Boot and Linux.
Therefore, we would implicitly like U-Boot to hide the CPU port from the
user as well.

But the paradox is that DSA still needs a struct phy_device to inform
the driver of the parameters of the link that it should configure the
CPU port to. The problem is that the phy_device is typically returned
via a call to phy_connect, which needs an udevice to attach the PHY to,
and to search its ofnode for the 'fixed-link' property. But we don't
have an udevice to present for the CPU port.

Since 99% of DSA setups are MAC-to-MAC connections between the switch
and the host Ethernet controller, the struct phy_device is going to be a
fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
does not need an MDIO bus, and does not need an attached dev either.
Basically, the phy_connect call doesn't do any connection, it just
creates the fixed PHY.

The proposal of this patch is to introduce a new fixed_phy_create
function which will take a single argument: the ofnode that holds this:

	port@4 {
		reg = &lt;4&gt;;
		phy-mode = "internal";

		fixed-link {
			speed = &lt;2500&gt;;
			full-duplex;
		};
	};

and probe a fixed PHY driver using the information from this ofnode.
DSA will probably be the only user of this function.

Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The DSA (Distributed Switch Architecture) implementation has made a
design decision when it got introduced to the Linux kernel in 2008.
That was to hide away from the user the CPU-facing Ethernet MAC, since
it does not make sense to register it as a struct net_device (UCLASS_ETH
udevice for U-Boot), because that would never be beneficial for a user:
they would not be able to use it for traffic, since conceptually, a
packet delivered to the CPU port should loop back into the system.

Nonetheless, DSA has had numerous growing pains due to the lack of a
struct net_device for the CPU port, but so far it has overcome them.
It is unlikely at this stage of maturity that this aspect of it will
change.

We would like U-Boot to present the same information as Linux, to be at
parity in terms of number of interfaces, so that ethNaddr environment
variables could directly be associated between U-Boot and Linux.
Therefore, we would implicitly like U-Boot to hide the CPU port from the
user as well.

But the paradox is that DSA still needs a struct phy_device to inform
the driver of the parameters of the link that it should configure the
CPU port to. The problem is that the phy_device is typically returned
via a call to phy_connect, which needs an udevice to attach the PHY to,
and to search its ofnode for the 'fixed-link' property. But we don't
have an udevice to present for the CPU port.

Since 99% of DSA setups are MAC-to-MAC connections between the switch
and the host Ethernet controller, the struct phy_device is going to be a
fixed PHY. This simplifies things quite a bit. In U-Boot, a fixed PHY
does not need an MDIO bus, and does not need an attached dev either.
Basically, the phy_connect call doesn't do any connection, it just
creates the fixed PHY.

The proposal of this patch is to introduce a new fixed_phy_create
function which will take a single argument: the ofnode that holds this:

	port@4 {
		reg = &lt;4&gt;;
		phy-mode = "internal";

		fixed-link {
			speed = &lt;2500&gt;;
			full-duplex;
		};
	};

and probe a fixed PHY driver using the information from this ofnode.
DSA will probably be the only user of this function.

Signed-off-by: Vladimir Oltean &lt;vladimir.oltean@nxp.com&gt;
Reviewed-by: Claudiu Manoil &lt;claudiu.manoil@nxp.com&gt;
</pre>
</div>
</content>
</entry>
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