u-boot.git/drivers/net, branch v2023.01-rc2

global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace

2022-11-10T15:08:55Z

Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace. Signed-off-by: Tom Rini Reviewed-by: Simon Glass

global: Migrate CONFIG_SYS_MPC8* symbols to the CFG_SYS namespace

2022-11-10T15:08:55Z

Migrate all of COFIG_SYS_MPC* to the CFG_SYS namespace. Signed-off-by: Tom Rini

net: mvneta: Add support for AlleyCat5

2022-11-07T06:46:28Z

Add support for the AlleyCat5 SoC. This lacks the mbus from the other users of the mvneta.c driver so a new compatible string is needed to allow for a different window configuration. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese

treewide: Remove the unnecessary space before semicolon

2022-11-02T17:58:17Z

%s/return ;/return; Signed-off-by: Bin Meng

net/ftgmac100: Add NC-SI mode support

2022-10-21T20:04:39Z

Update the ftgmac100 driver to support NC-SI instead of an mdio phy where available. This is a common setup for Aspeed AST2x00 platforms. NC-SI mode is determined from the device-tree if either phy-mode sets it or the use-ncsi property exists. If set then normal mdio setup is skipped in favour of the NC-SI phy. Signed-off-by: Samuel Mendoza-Jonas Signed-off-by: Joel Stanley Reviewed-by: Cédric Le Goater Reviewed-by: Ramon Fried

net: NC-SI setup and handling

2022-10-21T20:04:39Z

Add the handling of NC-SI ethernet frames, and add a check at the start of net_loop() to configure NC-SI before starting other network commands. Signed-off-by: Samuel Mendoza-Jonas Signed-off-by: Joel Stanley Reviewed-by: Cédric Le Goater Reviewed-by: Ramon Fried

Merge tag 'xilinx-for-v2023.01-rc1-v3' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

2022-10-11T13:57:08Z

Xilinx changes for v2023.01-rc1 (round 3) fpga: - Create new uclass - Get rid of FPGA_DEBUG and use logging infrastructure zynq: - Enable early EEPROM decoding - Some DT updates zynqmp: - Use OCM_BANK_0 to check config loading permission - Change config object loading in SPL - Some DT updates net: - emaclite: Enable driver for RISC-V xilinx: - Fix static checker warnings - Fix GCC12 warning sdhci: - Read PD id from DT

net: ti: am65-cpsw-nuss: Enable MDIO manual mode

2022-10-07T01:05:17Z

For the TI SoCs affected by errata i2329, enable MDIO manual mode by default Signed-off-by: Ravi Gunasekaran Reviewed-by: Ramon Fried

net: ti: cpsw-mdio: Add workaround for errata i2329

2022-10-07T01:05:17Z

In certain TI SoCs, on the CPSW and ICSS peripherals, there is a possibility that the MDIO interface returns corrupt data on MDIO reads or writes incorrect data on MDIO writes. There is also a possibility for the MDIO interface to become unavailable until the next peripheral reset. The workaround is to configure the MDIO in manual mode and disable the MDIO state machine and emulate the MDIO protocol by reading and writing appropriate fields in MDIO_MANUAL_IF_REG register of the MDIO controller to manipulate the MDIO clock and data pins. More details about the errata i2329 and the workaround is available in: https://www.ti.com/lit/er/sprz487a/sprz487a.pdf Add implementation to disable MDIO state machine, configure MDIO in manual mode and provide software MDIO read and writes via MDIO bitbanging. Allow the MDIO to be initialized based on the need for manual mode. Signed-off-by: Ravi Gunasekaran Reviewed-by: Ramon Fried

net: Fix static checker warnings

2022-10-05T09:36:54Z

Here are the smatch warning messages: drivers/net/xilinx_axi_emac.c:324 axiemac_phy_init() error: 'phydev' dereferencing possible ERR_PTR() drivers/net/zynq_gem.c:340 zynq_phy_init() error: 'priv->phydev' dereferencing possible ERR_PTR() Fix by adding error checking before dereferencing the pointer. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20220929045605.23964-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek