In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>

The mv88e6xxx driver does not currently initialize the smi_addr field, but
instead keeps the default zero value. This leads to driver being unusable
on devices where the switch is not on address zero of the mdio bus. Fix
this problem by reading the SMI address from device tree.

Signed-off-by: Marek Mojík <marek.mojik@nic.cz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>

Rename RMOBILE_CPU_TYPE_* to RENESAS_CPU_TYPE_* because all
the chips are made by Renesas, while only a subset of them is
from the R-Mobile line.

Use the following command to perform the rename:

"
$ git grep -l '\<RMOBILE_CPU_TYPE_[A-Z0-9]\+\>' | \
  xargs -I {} sed -i 's@\<RMOBILE\(_CPU_TYPE_[A-Z0-9]\+\)\>@RENESAS\1@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>

Rename rmobile_get_cpu_type() to renesas_get_cpu_type() because
all the chips are made by Renesas, while only a subset of them
is from the R-Mobile line.

Use the following command to perform the rename:

"
$ git grep -l '\<rmobile_get_cpu_type\>' | \
  xargs -I {} sed -i 's@\<rmobile_get_cpu_type\>@renesas_get_cpu_type@g' {}
"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>

Some platforms (such as the Lichee Pi 4A) have their dwmac device
addressable only in high memory space. Storing the node's base address
on 32 bits is not possible in such case.

Use platform's physical address type to store the base address.

Signed-off-by: Nils Le Roux <gilbsgilbert@gmail.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

Add TJA1120 driver structure and report 1G speed.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>

Rename nxp_c45_tja11xx structure to nxp_c45_tja1103. The driver will
support more PHYs and nxp_c45_tja11xx is too generic.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>

Read PHY speed from hardware instead of assuming 100Mbps by default.
The TJA1103 works only at 100Mbps, but the driver will support more PHYs.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>

Use a local definition for the PHY features. PHY_100BT1_FEATURES are
not defined using the 100BaseT1 bit, so keep this workaround in the driver.

Signed-off-by: "Radu Pirea (NXP OSS)" <radu-nicolae.pirea@oss.nxp.com>

Some ethernet PHY require being reset before a phy-id can be read back
on the MDIO bus. This can result in the following message being show
on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY.

  Could not get PHY for ethernet@ff540000: addr -1

Add support to designware ethernet driver to reset eth phy by calling
the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL
as bus parameter to not set a shared mdio bus reference that would be
freed when probe fails. Also add a eth_phy_get_addr() call to try and
get the phy addr from DT when DM_MDIO is disabled.

This help fix ethernet on Radxa ROCK Pi E v1.21:

  => mdio list
  ethernet@ff540000:
  1 - RealTek RTL8211F <--> ethernet@ff540000

Reported-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>