u-boot.git/drivers/net, branch v2024.04-rc2

net: designware: Support high memory nodes

2024-02-12T18:41:03Z

Some platforms (such as the Lichee Pi 4A) have their dwmac device addressable only in high memory space. Storing the node's base address on 32 bits is not possible in such case. Use platform's physical address type to store the base address. Signed-off-by: Nils Le Roux Cc: Andre Przywara Reviewed-by: Andre Przywara

net: phy: nxp-c45-tja11xx: add tja1120 support

2024-02-08T02:41:24Z

Add TJA1120 driver structure and report 1G speed. Signed-off-by: "Radu Pirea (NXP OSS)"

net: phy: nxp-c45-tja11xx: rename nxp_c45_tja11xx structure

2024-02-08T02:41:24Z

Rename nxp_c45_tja11xx structure to nxp_c45_tja1103. The driver will support more PHYs and nxp_c45_tja11xx is too generic. Signed-off-by: "Radu Pirea (NXP OSS)"

net: phy: nxp-c45-tja11xx: read PHY the speed from hardware

2024-02-08T02:41:23Z

Read PHY speed from hardware instead of assuming 100Mbps by default. The TJA1103 works only at 100Mbps, but the driver will support more PHYs. Signed-off-by: "Radu Pirea (NXP OSS)"

net: phy: nxp-c45-tja11xx: use local definion of features

2024-02-08T02:41:23Z

Use a local definition for the PHY features. PHY_100BT1_FEATURES are not defined using the 100BaseT1 bit, so keep this workaround in the driver. Signed-off-by: "Radu Pirea (NXP OSS)"

net: designware: Reset eth phy before phy connect

2024-02-04T10:02:45Z

Some ethernet PHY require being reset before a phy-id can be read back on the MDIO bus. This can result in the following message being show on e.g. a Radxa ROCK Pi E v1.21 with a RTL8211F ethernet PHY. Could not get PHY for ethernet@ff540000: addr -1 Add support to designware ethernet driver to reset eth phy by calling the eth phy uclass function eth_phy_set_mdio_bus(). The call use NULL as bus parameter to not set a shared mdio bus reference that would be freed when probe fails. Also add a eth_phy_get_addr() call to try and get the phy addr from DT when DM_MDIO is disabled. This help fix ethernet on Radxa ROCK Pi E v1.21: => mdio list ethernet@ff540000: 1 - RealTek RTL8211F <--> ethernet@ff540000 Reported-by: Trevor Woerner Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang

net: phy: motorcomm: configure pad drive strength register

2024-01-31T08:52:49Z

This ports the pad drive strength register configuration which can be already found in the Linux driver for this PHY. Signed-off-by: Lukasz Tekieli Reviewed-by: Leo Yu-Chi Liang

treewide: Remove clk_free

2024-01-30T03:35:02Z

This function is a no-op. Remove it. Signed-off-by: Sean Anderson Link: https://lore.kernel.org/r/20231216193843.2463779-3-seanga2@gmail.com

net: sun8i-emac: Add support for fixed-link phy

2024-01-29T14:30:59Z

Make the "phy-handle" property optional, which allows support for a fixed-link phy configuration. Thus if the "phy-handle" is present in a DT, then driver will work as before. Otherwise, phyaddr initialization will not be necessary, as it is not needed in case of a fixed-link config. Signed-off-by: Maksim Kiselev Reviewed-by: Ramon Fried Reviewed-by: Andre Przywara

Merge patch series "net fixes prior lwip"

2024-01-11T16:25:07Z

Maxim Uvarov says: Add small net fixes prior lwip patches.