u-boot.git/drivers/net, branch v2025.04

net: tsec: Re-arm packet buffer in error case

2025-03-03T06:18:49+00:00

When an error is detected in the TSEC receive path, the driver currently
prints an error message, but leaves the corresponding packet descriptor
in its old state (i.e. owned by the CPU side). As a result, the packet
queue can be starved of available buffers if enough errors happen.

To recover from errors, re-arm the packet buffer descriptor after an
error has been detected.

Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to
phy-mode = "rgmii".

Signed-off-by: J. Neuschäfer 
Signed-off-by: Peng Fan

net: tsec: Reorder tsec_recv and tsec_free_pkt

2025-03-03T06:18:48+00:00

This is necessary for the following patch. No functional change.

Signed-off-by: J. Neuschäfer 
Signed-off-by: Peng Fan

net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK3588

2025-02-19T15:26:11+00:00

When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang

net: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK356x

2025-02-19T15:26:11+00:00

When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX
and/or TX delay. Currently RX/TX delay is configured as enabled using
zero as delay value for the rgmii-rxid/txid/id modes.

Change to disable RX and/or TX delay and using zero as delay value.

Signed-off-by: Jonas Karlman 
Reviewed-by: Quentin Schulz 
Reviewed-by: Kever Yang

net: designware: support phy io micro voltage setting.

2025-02-10T16:28:36+00:00

Support phy io micro voltage setting for NPCM8XX rgmii
interface.

Signed-off-by: Michael Chang

net: miiphybb: Update debug() print

2025-02-04T22:34:42+00:00

Update the debug() print, use __func__ to always print matching
function name, and also print bus name in case there are multiple
busses.

Signed-off-by: Marek Vasut 
Reviewed-by: Paul Barker

net: miiphybb: Convert ifdef DEBUG to debug()

2025-02-04T22:34:37+00:00

Replace ifdeffery with plain debug() function call. No functional change.

Signed-off-by: Marek Vasut 
Reviewed-by: Paul Barker

net: mediatek: fix coding style of AN8855 switch driver

2025-01-31T17:29:01+00:00

This patch fixed the following coding style suggested by checkpatch.pl:
1. Use tab instead of space
2. Use BIT() instead of <<
3. Use mdelay for long time delay
4. Remove useless parenthesises

Signed-off-by: Weijie Gao

net: phy: Add RGMII RX/TX delay handling to DP83822 PHY

2025-01-31T01:28:33+00:00

The TI DP83822 does have support for configurable RGMII RX/TX clock
shift, add support for parsing DT properties which describe the RX/TX
clock shift configuration and configuration of the matching bits in
RCSR register.

The shift is only configurable on DP83822, the other PHYs supported
by this PHY driver, namely DP83825/DP83826 variants, do not implement
this functionality and the RCSR bits used to configure the clock shift
are missing from those PHYs.

The shift is configurable separately for RX and TX path. Each path can
either enable the shift or disable the shift using single bit. In case
the shift is disabled, a delay of 0ns is added to the path, otherwise
a delay of 3.5ns is added to the path.

Note that the two RCSR bits 11 and 12 have inverted logic, RCSR bit 12
enables RX internal shift when SET, while RCSR bit 11 enables TX shift
when UNSET.

Signed-off-by: Marek Vasut

net: ravb: Staticize bb_miiphy functions

2025-01-29T21:52:23+00:00

These functions can be static as they are referenced only in this file.
Make them static. No functional change.

Signed-off-by: Marek Vasut 
Reviewed-by: Paul Barker