u-boot.git/drivers/net, branch v2025.07-rc3

net: fsl_enetc: fix imdio register calculation

2025-05-12T21:43:19Z

With commit cc4e8af2c552, fsl_enetc register accessors have been split to handle different register offsets on different SoCs. However, for internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed without adding the SoC specific MAC register offset. As a result, the network support for the Kontron SMARC-sAL28 and probably other boards based on the LS1028A CPU is broken. Add the SoC specific MAC register offset to calculation of imdio.priv to fix this. Fixes: cc4e8af2c552 ("net: fsl_enetc: Split register accessors") Signed-off-by: Thomas Schaefer Signed-off-by: Heiko Thiery Reviewed-by: Michael Walle Reviewed-by: Vladimir Oltean Tested-by: Vladimir Oltean # LS1028A Tested-by: Tim Harvey # imx95_19x19_evk Reviewed-by: Marek Vasut Reviewed-by: Alice Guo

net: dwc: xgmac: Allow DMA buffers above 4GB

2025-05-09T21:02:38Z

Currently, Synopsis xgmac driver only works if DMA region is under 4GB. This change enables the DMA buffers allocations above 4GB memory regions. Signed-off-by: Nikunj Kela

net: gmac_rockchip: Add RMII support for rk3288

2025-05-08T03:48:13Z

Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits (10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii() function to set the PHY interface field and RMII_MODE bit. Signed-off-by: Christoph Fritz Reviewed-by: Kever Yang

eth: Support E1000E I225-V

2025-05-05T20:16:50Z

1. Add pcie device id 0x15f3 2. Add IIC phy id 0x67C9DC00 Signed-off-by: ZhiJie.Zhang

net: dwc_eth_qos: add support of stm32mp2 platform

2025-05-05T13:51:47Z

Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards Signed-off-by: Christophe Roullier Signed-off-by: Patrice Chotard Reviewed-by: Marek Vasut Reviewed-by: Patrick Delaunay

net: ravb: Add RZ/G2L Support

2025-05-04T18:25:03Z

The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet interfaces which can be supported using the ravb driver. Some RZ/G2L specific steps need to be taken during initialization due to differences between this SoC and previously supported SoCs. We also need to ensure that the module reset is de-asserted after the module clock is enabled but before any Ethernet register reads/writes take place. Signed-off-by: Paul Barker

net: ravb: Add optional reset deassertion

2025-05-04T18:25:03Z

In order to add support for the Renesas RZ/G2L Ethernet IP in a subsequent patch, we introduce optional de-assertion and re-assertion of a reset signal in ravb_probe() and ravb_remove(). Signed-off-by: Paul Barker

net: ravb: Refactor out R-Car specific code

2025-05-04T18:25:03Z

In order to add support for the Renesas RZ/G2L Ethernet IP in a subsequent patch, we move all R-Car specific code into new functions and introduce a device_ops function pointer table. Signed-off-by: Paul Barker

net: ravb: Fix RX error handling

2025-05-04T18:23:31Z

Correctly handle RX errors in ravb_recv() by returning 0 instead of -EAGAIN on RX error. In case the RAVB driver detects an RX error in ravb_recv(), it must not return the -EAGAIN, but instead must return 0. Both error codes are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0 at the end of eth_rx(), but negative return code from the .recv() callback does not trigger .free_pkt() callback, which would clean up and re-enqueue the descriptor which holds the currently received corrupted packet. The .free_pkt() must be called for this descriptor, otherwise the follow up received data become corrupted too, even if those packets are correctly received. Returning 0 from the .recv() callback assures the corrupted packet is not processed by the network stack, but is skipped instead. For TFTP loading, an RX error produces the timeout "T" output and resumes the TFTP loading operation shortly afterward, without any data corruption. Signed-off-by: Marek Vasut Reviewed-by: Paul Barker

net: ti: am65-cpsw-nuss: invoke phy_config() in driver's .start callback

2025-04-28T19:24:56Z

Currently, the phy_config() API is invoked by the driver only once since it has been probed. While this works in general, it doesn't allow the driver to bring the PHY back to its default reset state. As a result, the driver might not be able to recover the PHY from a bad state. To address this, move phy_config() into the driver's start callback (am65_cpsw_start()). Apart from providing the means to recover the PHY in the event of failure, the implementation is in line with the idea of "reset and configure" that is already followed by am65_cpsw_start() when it comes to programming the CPSW MAC. Signed-off-by: Siddharth Vadapalli