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<title>u-boot.git/drivers/net, branch v2026.04-rc4</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/net?h=v2026.04-rc4</id>
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<updated>2026-03-04T20:25:27Z</updated>
<entry>
<title>treewide: Remove Timesys from ADI ADSP maintenance</title>
<updated>2026-03-04T20:25:27Z</updated>
<author>
<name>Philip Molloy</name>
<email>philip.molloy@analog.com</email>
</author>
<published>2026-02-26T11:11:50Z</published>
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<id>urn:sha1:15e2bacc308d1ea2f50c53f8116fd15ba6c4af6e</id>
<content type='text'>
After years of developing the ADI ADSP platform, Timesys was purchased
by another company and is no longer contracted to maintain the platform.

Signed-off-by: Philip Molloy &lt;philip.molloy@analog.com&gt;
Reviewed-by: Greg Malysa &lt;malysagreg@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: Enable RMII clock output for VSC8541 PHY</title>
<updated>2026-02-11T08:41:26Z</updated>
<author>
<name>Pranav Tilak</name>
<email>pranav.vinaytilak@amd.com</email>
</author>
<published>2026-01-29T08:10:54Z</published>
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<id>urn:sha1:ce6fc049b700894b2a8f25778103cf4f2d29cb34</id>
<content type='text'>
Set RMII reference clock output to enabled (1) by default for VSC8541
PHY in RMII mode. The RMII specification requires a 50MHz reference
clock, and many board designs expect the PHY to provide this clock to
the MAC controller.

Previously, the driver defaulted rmii_clk_out to 0 (disabled) for all
interface modes, which caused the PHY to not output the required 50MHz
clock. This resulted in MAC-PHY communication failures and prevented
network operations like DHCP from working on RMII-configured boards.

This change alligns with the hardware power-up default behavior and
aligns with both the generic PHY driver and Linux MSCC PHY driver
implementations.

Signed-off-by: Pranav Tilak &lt;pranav.vinaytilak@amd.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@amd.com&gt;
Link: https://lore.kernel.org/r/20260129081054.1703479-1-pranav.vinaytilak@amd.com
</content>
</entry>
<entry>
<title>Merge tag 'net-20260209' of https://source.denx.de/u-boot/custodians/u-boot-net</title>
<updated>2026-02-09T14:28:01Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2026-02-09T14:28:01Z</published>
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<id>urn:sha1:d395ea73dc2814a2ec5b309e90df8c618d89ede0</id>
<content type='text'>
Pull request net-20260209.

net:
- airoha: mdio support for the switch
- phy: mscc: allow RGMII with internal delay for the VSC8541
- dwc_eth_qos: Update tail pointer handling

net-legacy:
- Stop conflating return value with file size in net_loop()

net-lwip:
- wget: rework the '#' printing
- tftp: add support of tsize option to client
</content>
</entry>
<entry>
<title>net: fec_mxc: Add support for i.MX91</title>
<updated>2026-02-06T23:29:30Z</updated>
<author>
<name>Primoz Fiser</name>
<email>primoz.fiser@norik.com</email>
</author>
<published>2026-01-29T07:52:51Z</published>
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<id>urn:sha1:1a79ea5b36e1410ff7f551bcb2cc542185371586</id>
<content type='text'>
The i.MX91 SoC reuses the ENET FEC from i.MX93. Add all required driver
checks to make it work also on the i.MX91 based platforms.

Signed-off-by: Primoz Fiser &lt;primoz.fiser@norik.com&gt;
</content>
</entry>
<entry>
<title>net: phy: mscc: allow RGMII with internal delay for the VSC8541</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Charles Perry</name>
<email>charles.perry@microchip.com</email>
</author>
<published>2026-02-03T19:01:40Z</published>
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<id>urn:sha1:e7b83e64d6bc9f2366669118cb596d75f811eb89</id>
<content type='text'>
Add the missing RGMII modes with internal delay for the VSC8541.

Fixes: a5fd13ad1913 ("net: phy: MSCC Add Support for VSC8530-VSC8531-VSC8540-VSC8541")
Signed-off-by: Charles Perry &lt;charles.perry@microchip.com&gt;
</content>
</entry>
<entry>
<title>net: mdio-mt7531-mmio: fix switch regs initialization</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2026-01-30T22:06:25Z</published>
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<id>urn:sha1:3aabc0dae03b824ffae06a16a48bf2c89b5c36e7</id>
<content type='text'>
mdio is a child node of the switch, so to get switch base address
we need to lookup for a parent node

Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>net: airoha_eth: use proper switch node for en7523 case</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2026-01-30T22:06:24Z</published>
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<id>urn:sha1:caa62920e32a4ea2c134b44265eb19429814b430</id>
<content type='text'>
Commit d2145a89bcf6 ("net: airoha: bind MDIO controller on Ethernet load")
uses "airoha,en7581-switch" dts node for finding MDIO childs. This is wrong
for EN7523 SoC. The correct node name should be used instead.

Fixes: d2145a89bcf6 ("net: airoha: bind MDIO controller on Ethernet load")
Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>net: airoha_eth: fix mdio binding to switch device</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Mikhail Kshevetskiy</name>
<email>mikhail.kshevetskiy@iopsys.eu</email>
</author>
<published>2026-01-30T22:06:23Z</published>
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<id>urn:sha1:1db453a5fee45194be920de6d1b5edf2117ebe1c</id>
<content type='text'>
Commit d2145a89bcf6 ("net: airoha: bind MDIO controller on Ethernet load")
refers to non-present CONFIG_MDIO_MT7531 and non-present "mt7531-mdio"
driver. It should use CONFIG_MDIO_MT7531_MMIO and "mt7531-mdio-mmio"
instead.

Fixes: d2145a89bcf6 ("net: airoha: bind MDIO controller on Ethernet load")
Signed-off-by: Mikhail Kshevetskiy &lt;mikhail.kshevetskiy@iopsys.eu&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos: Define more of the unused MAC regs</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-01-29T21:01:52Z</published>
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<id>urn:sha1:5fdc297b893eb5cc3e0cfe43359fba9680aa0299</id>
<content type='text'>
Multicast and Broadcast Queue Enable and Promiscuous Mode Enable bits
are currently written to "unused" registers using magic values.

Define more of the "unused" MAC regs based on information in the
DesignWare Cores Ethernet Quality-of-Service databook.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
<entry>
<title>net: dwc_eth_qos: Start DMA and MAC after tail pointers are initialized</title>
<updated>2026-02-06T15:42:45Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2026-01-29T21:01:51Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8beb70f2309d6fd6abb1d5c539edab9b0934d656'/>
<id>urn:sha1:8beb70f2309d6fd6abb1d5c539edab9b0934d656</id>
<content type='text'>
The DesignWare Cores Ethernet Quality-of-Service databook state that
receive and transmit descriptor list address and also transmit and
receive tail pointer registers should be initialized before the receive
and transmit DMAs are started.

It also state to enable the MAC receiver only after the DMA is active.
Otherwise, received frames can fill the Rx FIFO and overflow.

Move the activation of receive and transmit DMA and MAC receiver until
after tail pointer registers have been initialized.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
</content>
</entry>
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