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<title>u-boot.git/drivers/pci, branch v2014.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2014.04-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2014.04-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2014-03-04T17:15:01Z</updated>
<entry>
<title>sizes.h - consolidate for all architectures</title>
<updated>2014-03-04T17:15:01Z</updated>
<author>
<name>Alexey Brodkin</name>
<email>Alexey.Brodkin@synopsys.com</email>
</author>
<published>2014-02-26T13:47:58Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1ace4022394eacbdae12e7275c445699f8ad4833'/>
<id>urn:sha1:1ace4022394eacbdae12e7275c445699f8ad4833</id>
<content type='text'>
Copied from Linux sources "include/linux/sizes.h" commit
413541dd66d51f791a0b169d9b9014e4f56be13c

Signed-off-by: Alexey Brodkin &lt;abrodkin@synopsys.com&gt;

Cc: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
Cc: Stefan Roese &lt;sr@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Acked-by: Tom Rini &lt;trini@ti.com&gt;
Acked-by: Stefan Roese &lt;sr@denx.de&gt;
[trini: Add bcm Kona platforms to the patch]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'</title>
<updated>2014-02-19T11:04:45Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-02-19T11:04:45Z</published>
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<id>urn:sha1:e7538fee991308c16f76f7eca2517089f2a30ff4</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'u-boot-pxa/master' into 'u-boot-arm/master'</title>
<updated>2014-02-19T06:15:01Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2014-02-19T06:15:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a87a0ce7028d5371c81d77ba72c1ba43a1ca77bc'/>
<id>urn:sha1:a87a0ce7028d5371c81d77ba72c1ba43a1ca77bc</id>
<content type='text'>
</content>
</entry>
<entry>
<title>pci: mx6: Implement reset callback</title>
<updated>2014-02-11T10:24:12Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-02-03T20:46:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bb01956344da904463870104d3a66ecfffea7c7a'/>
<id>urn:sha1:bb01956344da904463870104d3a66ecfffea7c7a</id>
<content type='text'>
Add a callback so that a board can implement it's own specific routine to
toggle the port's #PERST line or #define a GPIO to do so.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
</entry>
<entry>
<title>ARM: PCI: Remove the IXP PCI driver</title>
<updated>2014-02-06T01:51:52Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2014-01-27T23:18:20Z</published>
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<id>urn:sha1:c75692d3625c415e0e3fe982bd72a3300d828465</id>
<content type='text'>
The driver is no longer used, remove it.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Michael Schwingen &lt;michael@schwingen.org&gt;
Cc: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>driver/fsl_pci:Update print to display PCIe generation</title>
<updated>2014-02-03T16:38:48Z</updated>
<author>
<name>Prabhakar Kushwaha</name>
<email>prabhakar@freescale.com</email>
</author>
<published>2014-01-25T07:23:32Z</published>
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<id>urn:sha1:aceea941b65130459eae1e6faec14768d1ce9d24</id>
<content type='text'>
Current print only display width of PCIe device. Add print to display
PCIe generation supported by the device.

Signed-off-by: Prabhakar Kushwaha &lt;prabhakar@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>ARM: mx6: Add PCI express driver</title>
<updated>2014-01-26T11:41:20Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2013-12-14T04:55:28Z</published>
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<id>urn:sha1:e9be4292e4f32bcdfb88c19407da281e36447498</id>
<content type='text'>
Add PCIe driver for the Freescale i.MX6 SoC . This driver operates the
PCIe block in RC mode only, the EP mode is NOT supported. The driver is
tested with the Intel e1000 NIC driver.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Albert Aribaud &lt;albert.u.boot@aribaud.net&gt;
Cc: Eric Nelson &lt;eric.nelson@boundarydevices.com&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
</content>
</entry>
<entry>
<title>malta: support for coreFPGA6 boards</title>
<updated>2013-11-09T16:21:01Z</updated>
<author>
<name>Paul Burton</name>
<email>paul.burton@imgtec.com</email>
</author>
<published>2013-11-08T11:18:50Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=baf37f06c5cc51d2b9d71a2c83d5d92de60203a9'/>
<id>urn:sha1:baf37f06c5cc51d2b9d71a2c83d5d92de60203a9</id>
<content type='text'>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.

Due to the PCI I/O base differing between Maltas using gt64120 &amp; msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.

Tested on:
  - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
    with and without an L2 cache.
  - QEMU.

Signed-off-by: Paul Burton &lt;paul.burton@imgtec.com&gt;
</content>
</entry>
<entry>
<title>drivers: convert makefiles to Kbuild style</title>
<updated>2013-10-31T17:26:01Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2013-10-17T08:34:57Z</published>
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<id>urn:sha1:710f1d3d5f44731665a0d801d166c0f98c1de38e</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>PCIe:change the method to get the address of a requested capability in configuration space.</title>
<updated>2013-10-16T23:15:17Z</updated>
<author>
<name>Zhao Qiang</name>
<email>B45475@freescale.com</email>
</author>
<published>2013-10-12T05:46:33Z</published>
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<id>urn:sha1:287df01e6aef0464c5e5bcbd7e87aa4ff1f24f5a</id>
<content type='text'>
Previously, the address of a requested capability is define like that
	"#define PCI_DCR	0x78"
But, the addresses of capabilities is different with regard to PCIe revs.
So this method is not flexible.

Now a function to get the address of a requested capability is added and used.
It can get the address dynamically by capability ID.
The step of this function:
	1. Read Status register in PCIe configuration space to confirm that
	   Capabilities List is valid.
	2. Find the address of Capabilities Pointer Register.
	3. Find the address of requested capability from the first capability.

Signed-off-by: Zhao Qiang &lt;B45475@freescale.com&gt;
</content>
</entry>
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