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<title>u-boot.git/drivers/pci, branch v2015.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pci: tegra: Add Tegra PCIe driver</title>
<updated>2014-12-18T20:19:20+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-12-10T05:25:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f315828b0d31cac2559af626f75bcb7f5a0ac524'/>
<id>f315828b0d31cac2559af626f75bcb7f5a0ac524</id>
<content type='text'>
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.

This is based on the Linux kernel driver, originally submitted upstream
by Mike Rapoport.

Signed-off-by: Mike Rapoport &lt;mike@compulab.co.il&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
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<pre>
Add support for the PCIe controller found on some generations of Tegra.
Tegra20 has 2 root ports with a total of 4 lanes, Tegra30 has 3 root
ports with a total of 6 lanes and Tegra124 has 2 root ports with a total
of 5 lanes.

This is based on the Linux kernel driver, originally submitted upstream
by Mike Rapoport.

Signed-off-by: Mike Rapoport &lt;mike@compulab.co.il&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>arm: ls102xa: Update PCIe dts node status</title>
<updated>2014-12-11T17:35:56+00:00</updated>
<author>
<name>Minghuan Lian</name>
<email>Minghuan.Lian@freescale.com</email>
</author>
<published>2014-10-31T05:43:44+00:00</published>
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<content type='text'>
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian &lt;Minghuan.Lian@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
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<pre>
The patch changes PCIe dts node status to 'disabled' if the
corresponding controller is disabled according to serdes protocol.

Signed-off-by: Minghuan Lian &lt;Minghuan.Lian@freescale.com&gt;
Reviewed-by: York Sun &lt;yorksun@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>pci: Add general support for execution of video ROMs</title>
<updated>2014-11-25T14:11:14+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T03:56:33+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6854f87cbcad544dc07a02b96d358f81ca60c593'/>
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Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.

Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).

In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
Some platforms don't have native code for dealing with their video
hardware. In some cases they use a binary blob to set it up and perform
required actions like setting the video mode. This approach is a hangover
from the old PC days where a ROM was provided and executed during startup.

Even now, these ROMs are supplied as a way to set up video. It avoids the
code for every video chip needing to be provided in the boot loader. But
it makes the video much less flexible - e.g. it is not possible to do
anything else while the video init is happening (including waiting hundreds
of milliseconds for display panels to start up).

In any case, to deal with this sad state of affairs, provide an API for
execution of x86 video ROMs, either natively or through emulation.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Add functions to read and write a BAR address</title>
<updated>2014-11-25T13:34:00+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-11-15T01:18:30+00:00</published>
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<id>e8a552eb625f0b2d7a778d151af25a17c6d33b7b</id>
<content type='text'>
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
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<pre>
Some PCI functions cannot be auto-configured. Add a function to set up a
fixed BAR which can be used in these situations. Also add a function to read
the current address of a BAR.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Honour pci_skip_dev()</title>
<updated>2014-11-23T11:49:01+00:00</updated>
<author>
<name>Thierry Reding</name>
<email>treding@nvidia.com</email>
</author>
<published>2014-11-13T01:26:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4efe52bf23c96cee7052273bd8549caee4d0fdc2'/>
<id>4efe52bf23c96cee7052273bd8549caee4d0fdc2</id>
<content type='text'>
When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.

This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is attempted to a device
number larger than 0 outside of bus 0. pci_skip_dev() is therefore
implemented to prevent any such accesses.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
When enumerating devices, honour the pci_skip_dev() function. This can
be used by PCI controller drivers to restrict which devices will be
probed.

This is required by the NVIDIA Tegra PCIe controller driver, which will
fail with a data abort exception if an access is attempted to a device
number larger than 0 outside of bus 0. pci_skip_dev() is therefore
implemented to prevent any such accesses.

Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>linux/kernel.h: sync min, max, min3, max3 macros with Linux</title>
<updated>2014-11-23T11:48:30+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-11-06T18:03:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b41411954d4ccf6ddaa581178462017557b82b5d'/>
<id>b41411954d4ccf6ddaa581178462017557b82b5d</id>
<content type='text'>
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
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<pre>
U-Boot has never cared about the type when we get max/min of two
values, but Linux Kernel does.  This commit gets min, max, min3, max3
macros synced with the kernel introducing type checks.

Many of references of those macros must be fixed to suppress warnings.
We have two options:
 - Use min, max, min3, max3 only when the arguments have the same type
   (or add casts to the arguments)
 - Use min_t/max_t instead with the appropriate type for the first
   argument

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
Acked-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
Tested-by: Lukasz Majewski &lt;l.majewski@samsung.com&gt;
[trini: Fixup arch/blackfin/lib/string.c]
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: use __weak</title>
<updated>2014-10-25T11:01:59+00:00</updated>
<author>
<name>Jeroen Hofstee</name>
<email>jeroen@myspectrum.nl</email>
</author>
<published>2014-10-08T20:57:27+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7b19fd6d9f64230eed2595442dbf85116685acc9'/>
<id>7b19fd6d9f64230eed2595442dbf85116685acc9</id>
<content type='text'>
Signed-off-by: Jeroen Hofstee &lt;jeroen@myspectrum.nl&gt;
</content>
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<pre>
Signed-off-by: Jeroen Hofstee &lt;jeroen@myspectrum.nl&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>kconfig: add blank Kconfig files</title>
<updated>2014-09-24T22:30:28+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-09-16T07:32:58+00:00</published>
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<id>ed36323f6d217050f82a2200475959b8557a47e4</id>
<content type='text'>
This would be useful to start moving various config options.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
This would be useful to start moving various config options.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pcie_imx: Add mx6solox support</title>
<updated>2014-09-09T15:24:49+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2014-08-25T17:26:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1b8ad74a6f8cea55a727dc4b399baac46d0daef1'/>
<id>1b8ad74a6f8cea55a727dc4b399baac46d0daef1</id>
<content type='text'>
Let PCI on mx6solox also be supported.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
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<pre>
Let PCI on mx6solox also be supported.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Acked-by: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: add support for board_pci_fixup_dev function</title>
<updated>2014-09-09T14:15:02+00:00</updated>
<author>
<name>Tim Harvey</name>
<email>tharvey@gateworks.com</email>
</author>
<published>2014-08-08T05:49:56+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0991866cf7a10d4868aa2a10940b4def0f68cc50'/>
<id>0991866cf7a10d4868aa2a10940b4def0f68cc50</id>
<content type='text'>
Some board-level drivers may wish to have per-device fixup functions
for PCI devices.

Signed-off-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
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<pre>
Some board-level drivers may wish to have per-device fixup functions
for PCI devices.

Signed-off-by: Tim Harvey &lt;tharvey@gateworks.com&gt;
</pre>
</div>
</content>
</entry>
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