u-boot.git/drivers/pci, branch v2015.04 Unnamed repository; edit this file 'description' to name the repository. driver/pci: add Layerscape PCIe driver 2015-02-24T21:10:50+00:00 Minghuan Lian Minghuan.Lian@freescale.com 2015-01-21T09:29:20+00:00 e4e8cb71384a7572b32509df6aa257809b8dcd5d The patch adds Freescale Layerscape PCIe driver and provides up to 4 controllers support. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com> 
The patch adds Freescale Layerscape PCIe driver and provides
up to 4 controllers support.

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
PCI: add 64-bit prefetchable memory support 2015-02-16T20:48:26+00:00 David Feng fenghua@phytium.com.cn 2015-02-02T08:53:13+00:00 6eefd5279c4e80d613420066364ec3c8ba551a56 PCI specification allow prefetchable memory to be 32-bit or 64-bit. PCI express specification states that all memmory bars for prefetchable memory must be implemented as 64-bit. They all require that 64 bit prefetchble memory are suported especially when u-boot is ported to more and more 64bit processors. Signed-off-by: David Feng <fenghua@phytium.com.cn> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
PCI specification allow prefetchable memory to be 32-bit or 64-bit.
PCI express specification states that all memmory bars for prefetchable
memory must be implemented as 64-bit. They all require that 64 bit
prefetchble memory are suported especially when u-boot is ported to
more and more 64bit processors.

Signed-off-by: David Feng <fenghua@phytium.com.cn>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: video: Allow video ROM execution to fall back to the other method 2015-02-06T05:16:43+00:00 Simon Glass sjg@chromium.org 2015-01-28T05:13:34+00:00 bc17d8f4ac41a6a4bcc4b28f1c6216a5a034fa63 If the BIOS emulator is not available, allow use of native execution if available, and vice versa. This can be controlled by the caller. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
If the BIOS emulator is not available, allow use of native execution if
available, and vice versa. This can be controlled by the caller.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
pci: Add a function to find a device by class 2015-02-06T05:16:42+00:00 Simon Glass sjg@chromium.org 2015-01-28T05:13:27+00:00 250e039da8c7e485dabdc84f0457b2a901757e28 There is an existing function prototype in the header file but it is not implemented. Implement something similar. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
There is an existing function prototype in the header file but it is not
implemented. Implement something similar.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
drivers/pci/pci_rom.c: fix compile warning under 64bit mode 2015-01-30T14:19:16+00:00 Minghuan Lian Minghuan.Lian@freescale.com 2015-01-22T05:21:55+00:00 ef2d17fe21c54adf9f24ee0b32db4ebb56f4eb83 Fix this: drivers/pci/pci_rom.c:95:15: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] rom_header = (struct pci_rom_header *)rom_address; Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> 
Fix this:
drivers/pci/pci_rom.c:95:15: warning: cast to pointer from
integer of different size [-Wint-to-pointer-cast]
rom_header = (struct pci_rom_header *)rom_address;

Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
pci: tegra: Fix port information parsing 2015-01-24T00:25:30+00:00 Sjoerd Simons sjoerd.simons@collabora.co.uk 2015-01-20T17:06:53+00:00 053b86e6d8e50359412e626c33bae3f7bafd74dd commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the new fdtdec pci helpers. To get the device index of the root port, the "reg" property should be parsed from the dtb (as was previously the case). With this patch i can successfully network boot my jetson tk1 Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> 
commit a62e84d7b1824a202dd incorrectly changed the tegra pci code to the
new fdtdec pci helpers. To get the device index of the root port, the
"reg" property should be parsed from the dtb (as was previously the
case).

With this patch i can successfully network boot my jetson tk1

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
x86: Access the VGA ROM when needed 2015-01-24T00:24:54+00:00 Simon Glass sjg@chromium.org 2015-01-15T04:37:04+00:00 4a2708a097eacd7aa3d10ccf26a70a467fa69217 Add code to the generic pci_rom file to access the VGA ROM in PCI space when needed. Signed-off-by: Simon Glass <sjg@chromium.org> 
Add code to the generic pci_rom file to access the VGA ROM in PCI space
when needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
x86: pci: Don't stop when we get a vendor/device mismatch 2015-01-24T00:24:16+00:00 Simon Glass sjg@chromium.org 2014-12-30T02:32:27+00:00 c5caba03665b0491832ca4c38209d71ff28bf593 These are quite common and we may as well press on and not be so picky. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
These are quite common and we may as well press on and not be so picky.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Support ROMs on other archs 2015-01-24T00:24:15+00:00 Simon Glass sjg@chromium.org 2014-12-30T02:32:24+00:00 bdc88d4eb31e2bc84afb427c216c79e87a4233ef We shouldn't assume that the VGA ROM can always be loaded at c0000. This is only true on x86 machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
We shouldn't assume that the VGA ROM can always be loaded at c0000. This
is only true on x86 machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Correct endianness isues in pci_rom 2015-01-24T00:24:15+00:00 Simon Glass sjg@chromium.org 2014-12-30T02:32:23+00:00 40305240c66ab5e3725c131e321402c7dfe687a2 This code is too x86-dependent at present. Correct it so that it can run on big-endian machines. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
This code is too x86-dependent at present. Correct it so that it can run on
big-endian machines.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>