u-boot.git/drivers/pci, branch v2016.07

pci: tegra: actually program REFCLK_CFG* on recent SoCs

2016-07-05T18:14:32+00:00

On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead
tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However,
part of tegra_pcie_phy_enable() needs to happen in all cases. Move that
code to tegra_pcie_port_enable() instead.

For reference, NVIDIA's downstream Linux kernel performs this operation
in tegra_pcie_enable_rp_features(), which is called immediately after
tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot
driver, we'll just add it to the tail of tegra_pcie_port_enable() instead.

Signed-off-by: Stephen Warren 
Signed-off-by: Tom Warren

pci: tegra: correctly program PADS_REFCLK registers

2016-07-05T18:14:32+00:00

The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.

For reference, the values are all documented in NV bug 1771116 comment 20.
The Tegra210 value doesn't match the current TRM, but I've filed a bug to
get the TRM fixed. Earlier TRMs don't document the value this register
should contain, but the ASIC team has validated all these values, except
for the Tegra20 value which is simply left unchanged in this patch.

Signed-off-by: Stephen Warren 
Signed-off-by: Tom Warren

pcie/layerscape: fix bug in bus number computation when setting msi-map

2016-06-03T21:12:10+00:00

When multiple PCI cards are present in an ls2080a board, the second
card does not get its msi-map set up properly due to a bug in
computing the bus number.

The bus number returned by PCI_BDF() is not the actual PCI bus
number, but instead represents a global u-boot PCI bus number. A
given bus number is relative to hose->first_busno, so that has to be
subtracted from the PCI device id.

Signed-off-by: Bogdan Purcareata 
Acked-by: Stuart Yoder 
Reviewed-by: York Sun

pci: Drop CONFIG_SYS_SCSI_SCAN_BUS_REVERSE

2016-05-17T15:54:43+00:00

This option is not used by any board. Drop it.

Signed-off-by: Simon Glass 
Reviewed-by: Bin Meng

pci: tegra: fix DM conversion issues on Tegra20

2016-05-04T20:31:04+00:00

Tegra20's PCIe controller has a couple of quirks. There are workarounds in
the driver for these, but they don't work after the DM conversion:

1) The PCI_CLASS value is wrong in HW.

This is worked around in pci_tegra_read_config() by patching up the value
read from that register. Pre-DM, the PCIe core always read this via a
16-bit access to the 16-bit offset 0xa. With DM, 32-bit accesses are used,
so we need to check for offset 0x8 instead. Mask the offset value back to
32-bit alignment to make this work in all cases.

2) Accessing devices other than dev 1 causes a data abort.

Pre-DM, this was worked around in pci_skip_dev(), which the PCIe core code
called during enumeration while iterating over a bus. The DM PCIe core
doesn't use this function. Instead, enhance tegra_pcie_conf_address() to
validate the bdf being accessed, and refuse to access invalid devices.
Since pci_skip_dev() isn't used, delete it.

I've also validated that both these WARs are only needed for Tegra20, by
testing on Tegra30/Cardhu and Tegra124/Jetson TKx. So, compile them in
conditionally.

Fixes: e81ca88451cf ("dm: tegra: pci: Convert tegra boards to driver model for PCI")
Signed-off-by: Stephen Warren 
Reviewed-by: Thierry Reding 
Reviewed-by: Simon Glass 
Signed-off-by: Tom Warren

pci: Device scanning range fix

2016-04-25T19:10:43+00:00

The terminal condition in the area where a PCI device is scanned is wrong,
and 1f.7 isn't scanned.

Signed-off-by: Yoshinori Sato 
Reviewed-by: Bin Meng

pci/layerscape: set LUT and msi-map for discovered PCI devices

2016-03-21T19:42:13+00:00

msi-map properties are used to tell an OS how PCI requester IDs are
mapped to ARM SMMU stream IDs.

for all PCI devices discovered in a system:
  -allocate a LUT (look-up-table) entry in that PCI controller
  -allocate a stream ID for the device
  -program and enable a LUT entry (maps PCI requester id to stream ID)
  -set the msi-map property on the controller reflecting the
   LUT mapping

basic bus scanning loop/logic was taken from drivers/pci/pci.c
pci_hose_scan_bus().

Signed-off-by: Stuart Yoder 
Reviewed-by: York Sun

armv8: ls2080a: remove obsolete stream ID partitioning support

2016-03-21T19:42:12+00:00

Remove stream ID partitioning support that has been made
obsolete by upstream device tree bindings that specify how
representing how PCI requester IDs are mapped to MSI specifiers
and SMMU stream IDs.

Signed-off-by: Stuart Yoder 
Reviewed-by: York Sun

pci: Correct a few comments and nits

2016-03-17T02:27:23+00:00

Two comments are missing a parameter and there is an extra blank line. Also
two of the region access macros are misnamed. Correct these problems.

Signed-off-by: Simon Glass 
Reviewed-by: Bin Meng

pci: Add functions to update PCI configuration registers

2016-03-17T02:27:23+00:00

It is common to read a config register value, clear and set some bits, then
write back the updated value. Add functions to do this in one step, for
convenience.

Signed-off-by: Simon Glass 
Reviewed-by: Bin Meng