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<title>u-boot.git/drivers/pci, branch v2018.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>pci: Support parsing PCI controller DT subnodes</title>
<updated>2018-10-20T19:23:38+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut@gmail.com</email>
</author>
<published>2018-10-10T19:27:06+00:00</published>
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<content type='text'>
The PCI controller can have DT subnodes describing extra properties
of particular PCI devices, ie. a PHY attached to an EHCI controller
on a PCI bus. This patch parses those DT subnodes and assigns a node
to the PCI device instance, so that the driver can extract details
from that node and ie. configure the PHY using the PHY subsystem.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
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<pre>
The PCI controller can have DT subnodes describing extra properties
of particular PCI devices, ie. a PHY attached to an EHCI controller
on a PCI bus. This patch parses those DT subnodes and assigns a node
to the PCI device instance, so that the driver can extract details
from that node and ie. configure the PHY using the PHY subsystem.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: Add a little more debugging to pci_rom</title>
<updated>2018-10-09T10:40:27+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2018-10-01T18:22:44+00:00</published>
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<id>595aac98246bb26d128389e25b147ae9643afb26</id>
<content type='text'>
Add some logging on failure.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
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<pre>
Add some logging on failure.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Remove &lt;inttypes.h&gt; includes and PRI* usages in printf() entirely</title>
<updated>2018-09-11T00:48:17+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2018-08-06T11:47:40+00:00</published>
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<id>dee37fc99d945eb96f0f501d17833cbb05798ad3</id>
<content type='text'>
In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's &lt;inttypes.h&gt;.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
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<pre>
In int-ll64.h, we always use the following typedefs:

  typedef unsigned int         u32;
  typedef unsigned long        uintptr_t;
  typedef unsigned long long   u64;

This does not need to match to the compiler's &lt;inttypes.h&gt;.
Do not include it.

The use of PRI* makes the code super-ugly.  You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: rmobile: Filter out device 1 and 2</title>
<updated>2018-08-28T09:01:52+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@gmail.com</email>
</author>
<published>2018-08-24T19:03:14+00:00</published>
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<id>313360b13fd3773eb46811e0f93928d4d58c6f32</id>
<content type='text'>
Only PCI device 1 and 2 is populated on the R-Car Gen2 internal
PCIe controller. Ignore all other devices. This fix prevents a
duplication of OHCI controller response on slot 0 and 1.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
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<pre>
Only PCI device 1 and 2 is populated on the R-Car Gen2 internal
PCIe controller. Ignore all other devices. This fix prevents a
duplication of OHCI controller response on slot 0 and 1.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2018-08-13T16:34:55+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-13T16:34:55+00:00</published>
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<pre>
</pre>
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</entry>
<entry>
<title>FSL PCI: Configure PCIe reference ratio</title>
<updated>2018-08-08T15:23:48+00:00</updated>
<author>
<name>Joakim Tjernlund</name>
<email>joakim.tjernlund@infinera.com</email>
</author>
<published>2017-09-12T17:56:41+00:00</published>
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<id>6ce83fb3d6ac1cd25772b3c8c1265afbfa42f718</id>
<content type='text'>
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.

This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.

Signed-off-by: Joakim Tjernlund &lt;joakim.tjernlund@infinera.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
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<pre>
Most FSL PCIe controllers expects 333 MHz PCI reference clock.
This clock is derived from the CCB but in many cases the ref.
clock is not 333 MHz and a divisor needs to be configured.

This adds PEX_CCB_DIV #define which can be defined for each
type of CPU/platform.

Signed-off-by: Joakim Tjernlund &lt;joakim.tjernlund@infinera.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: pci: Add APIs to find capability and extended capability</title>
<updated>2018-08-08T11:49:31+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-08-03T08:14:52+00:00</published>
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<id>dac01fd89d41d98cd4ce040a0d10eb67c523f63a</id>
<content type='text'>
This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
This introduces two new APIs dm_pci_find_capability() and
dm_pci_find_ext_capability() to get PCI capability address and
PCI express extended capability address for a given PCI device.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: sandbox: emul: Rename priv structure</title>
<updated>2018-08-08T11:49:31+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-08-03T08:14:49+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=841f3216c298dbc5cf6802eac9ffe1e4da1167f4'/>
<id>841f3216c298dbc5cf6802eac9ffe1e4da1167f4</id>
<content type='text'>
We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
We have "struct sandbox_pci_priv" in pci_sandbox driver. To avoid
confusion, rename the emul's priv to "struct sandbox_pci_emul_priv".

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>pci: sandbox: Support dynamically binding device driver</title>
<updated>2018-08-08T11:49:31+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-08-03T08:14:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4345998ae9dfad7ba0beb54ad4322134557504a9'/>
<id>4345998ae9dfad7ba0beb54ad4322134557504a9</id>
<content type='text'>
At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
At present all emulated sandbox pci devices must be present in the
device tree in order to be used. The real world pci uclass driver
supports pci device driver matching, and we should add such support
on sandbox too.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: pci: Assign correct driver data when binding a driver</title>
<updated>2018-08-08T11:49:31+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2018-08-03T08:14:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ed698aa7dee0fd078b4eb2fc54e64cfeaa68061a'/>
<id>ed698aa7dee0fd078b4eb2fc54e64cfeaa68061a</id>
<content type='text'>
The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<pre>
The correct driver data comes from the matching 'id' instead of
'find_id' in pci_find_and_bind_driver().

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
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