<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/pci, branch v2019.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2019.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2019.04'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2019-03-19T08:22:05Z</updated>
<entry>
<title>pci: pci_mvebu: Add comment about missing of_n_addr_cells() call</title>
<updated>2019-03-19T08:22:05Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2019-02-11T06:53:34Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0df62e8da8f48d8bbabd1d92512173cbb424e3c5'/>
<id>urn:sha1:0df62e8da8f48d8bbabd1d92512173cbb424e3c5</id>
<content type='text'>
This patch adds a comment to explain the use of the hardcoded value for
the number of address cells in mvebu_get_tgt_attr(). This should help to
rework this function, once CONFIG_OF_LIVE is enabled for MVEBU in
general.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>pci: Don't export pci_hose_config_device()</title>
<updated>2019-02-20T07:21:44Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-02-17T03:24:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11503be4480d5091fb59c563a0c357b6967c24ba'/>
<id>urn:sha1:11503be4480d5091fb59c563a0c357b6967c24ba</id>
<content type='text'>
This function is not used outside this file so make it static.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>pcie: designware: mvebu: fix reset release polarity</title>
<updated>2019-02-11T08:39:12Z</updated>
<author>
<name>Baruch Siach</name>
<email>baruch@tkos.co.il</email>
</author>
<published>2019-02-03T13:15:39Z</published>
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<id>urn:sha1:6664a0e5f3694592966c92ec4a0547ad77b84a9a</id>
<content type='text'>
The dm_gpio_set_value() routine sets signal logical level, with
GPIO_ACTIVE_LOW/HIGH value taken into account. Reset active value is 1
(asserted), while reset inactive value is 0 (de-asserted). Fix the reset
toggle code to set the correct reset logic value.

Reported-by: Sven Auhagen &lt;sven.auhagen@voleatech.de&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-marvell</title>
<updated>2019-02-05T17:29:59Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2019-02-05T13:37:21Z</published>
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<id>urn:sha1:bdac5e18a80427e1f44413dce78aefece956ffc2</id>
<content type='text'>
- Move Armada XP / 38x PCIe driver to DM_PCI from me
- Move Armada XP / 38x LCD driver to DM_VIDEO from me
- Add uDPU board (Armada-3720) from Vladimir

[trini: Fix warning in pci-uclass.c by removing ret from
	pci_uclass_child_post_bind as it no longer calls functions with
        a return code to catch.]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;II
</content>
</entry>
<entry>
<title>pci: pci_mvebu: Add DM_PCI support and move CONFIG_PCI_MVEBU to defconfig</title>
<updated>2019-02-05T13:22:38Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2019-01-25T10:52:43Z</published>
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<id>urn:sha1:94f453ea38f52750d8da63e3745b548a9ee06dd4</id>
<content type='text'>
This patch adds DM_PCI support to the MVEBU PCIe driver. This is
necessary, since all PCI drivers have to be moved to DM (driver model)
until the v2019.07 release.

To not break git bisect'ablility, this patch also moves CONFIG_PCI_MVEBU
from config headers to the defconfig files.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Dirk Eibach &lt;dirk.eibach@gdsys.cc&gt;
Cc: Mario Six &lt;mario.six@gdsys.cc&gt;
Cc: Chris Packham &lt;chris.packham@alliedtelesis.co.nz&gt;
Cc: Phil Sutter &lt;phil@nwl.cc&gt;
Cc: Marek Behún &lt;marek.behun@nic.cz&gt;
Cc: VlaoMao &lt;vlaomao@gmail.com&gt;
</content>
</entry>
<entry>
<title>pci: Add pci_get_devfn() to extract devfn from the fdt_pci_addr</title>
<updated>2019-02-05T13:22:24Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2019-01-25T10:52:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b52142004fbdfd6db0091ba7ae33c91e3b459034'/>
<id>urn:sha1:b52142004fbdfd6db0091ba7ae33c91e3b459034</id>
<content type='text'>
This function will be used by the Marvell Armada XP/38x PCIe driver,
which is moved to DM right now. So let's extract the functionality
from pci_uclass_child_post_bind() to make it available.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>pci: layerscape: Add the dts fixup for EP and RC</title>
<updated>2019-01-17T21:17:40Z</updated>
<author>
<name>Xiaowei Bao</name>
<email>xiaowei.bao@nxp.com</email>
</author>
<published>2018-10-26T01:56:26Z</published>
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<id>urn:sha1:59a557f360a84f475fc10beabe14379322abf2ae</id>
<content type='text'>
Add the dts fixup when PCI controller work diffferent mode.

Signed-off-by: Xiaowei Bao &lt;xiaowei.bao@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>pci: layerscape: Do not scan when PEX work in EP mode</title>
<updated>2019-01-17T21:17:33Z</updated>
<author>
<name>Xiaowei Bao</name>
<email>xiaowei.bao@nxp.com</email>
</author>
<published>2018-10-26T01:56:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=87e0d2b9ac6e82dd2cb5164f029396a44fbbbe82'/>
<id>urn:sha1:87e0d2b9ac6e82dd2cb5164f029396a44fbbbe82</id>
<content type='text'>
Don't scan the bus when the PEX work in EP mode.

Signed-off-by: Xiaowei Bao &lt;xiaowei.bao@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>pci: layerscape: Modify the EP and RC mode judge method</title>
<updated>2019-01-17T21:17:28Z</updated>
<author>
<name>Xiaowei Bao</name>
<email>xiaowei.bao@nxp.com</email>
</author>
<published>2018-10-26T01:56:24Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5bd3c9d5565a40e3494867fa501e45be53d5e49a'/>
<id>urn:sha1:5bd3c9d5565a40e3494867fa501e45be53d5e49a</id>
<content type='text'>
Modify the RC and EP mode judge method, save the mode as a variable,
the variable will be used by other function.

Signed-off-by: Xiaowei Bao &lt;xiaowei.bao@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>video: Allow driver to specify the line length</title>
<updated>2018-12-03T18:09:44Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2018-11-29T22:08:52Z</published>
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<id>urn:sha1:06696ebe674de7f65d4f5046a8639b358c6b358c</id>
<content type='text'>
At present line_length is always calculated in video_post_probe(). But
some hardware may use a different line length, e.g. with a 1366-wide
display.

Allow the driver to set this value if needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Anatolij Gustschin &lt;agust@denx.de&gt;
</content>
</entry>
</feed>
