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<title>u-boot.git/drivers/pci, branch v2024.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2024.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/pci?h=v2024.01'/>
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<updated>2023-10-08T13:58:55Z</updated>
<entry>
<title>Merge tag 'u-boot-rockchip-20231007' of https://source.denx.de/u-boot/custodians/u-boot-rockchip</title>
<updated>2023-10-08T13:58:55Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-10-08T13:58:55Z</published>
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<id>urn:sha1:d9bb6d779b69c2548891e568e5e2a23e1b7eedaa</id>
<content type='text'>
- Add Board: rk3568 Bananapi R2Pro;
- Update pcie bifurcation support;
- dwc_eth_qos controller support for rk3568 and rk3588;
- Compressed binary support for U-Boot on rockchip platform;
- dts and config updates for different board and soc;

[ trini: Fix conflict on include/spl.h ]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>pci: pcie_dw_rockchip: Configure number of lanes and link width speed</title>
<updated>2023-10-07T02:23:12Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2023-08-02T19:25:51Z</published>
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<id>urn:sha1:9af0c7732bf1df29138bb63712dc3fcbc6d821af</id>
<content type='text'>
Set number of lanes and link width speed control register based on the
num-lanes property.

Code imported almost 1:1 from dw_pcie_setup in mainline linux.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>pci: serial: Support reading PCI-register size with base</title>
<updated>2023-10-06T18:38:13Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-26T14:14:58Z</published>
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<id>urn:sha1:f69d3d6d10b15872a279aeb10b7c522627aff6c2</id>
<content type='text'>
The PCI helpers read only the base address for a PCI region. In some cases
the size is needed as well, e.g. to pass along to a driver which needs to
know the size of its register area.

Update the functions to allow the size to be returned. For serial, record
the information and provided it with the serial_info() call.

A limitation still exists in that the size is not available when OF_LIVE
is enabled, so take account of that in the tests.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: Drop linux/printk.h from common header</title>
<updated>2023-09-24T13:54:57Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2023-09-15T00:21:46Z</published>
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<id>urn:sha1:1e94b46f73cedcebbff73799203f3266c5b28d90</id>
<content type='text'>
This old patch was marked as deferred. Bring it back to life, to continue
towards the removal of common.h

Move this out of the common header and include it only where needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pci: pcie-brcmstb: do not rely on CLKREQ# signal</title>
<updated>2023-08-30T15:47:43Z</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2023-08-16T22:27:53Z</published>
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<id>urn:sha1:59bf0cdfa9a76cb6da7532a10584bcd40c3e3a00</id>
<content type='text'>
When the Broadcom STB PCIe controller is initialized, it must be set
into one of three CLKREQ# modes: "none"/"aspm"/"l1ss". The Linux driver,
through today, hard-codes "aspm" since the vast majority of boards using
this driver have a fixed PCIe bus with the CLKREQ# signal wired up.

The Raspberry Pi CM4, however, can be connected to a plethora of PCIe
devices, some of which do not connect the CLKREQ# line (they just leave
it floating). So "aspm" mode is no longer appropriate in all cases. In
Linux, there is a proposed patchset [1] to determine the proper mode.
This doesn't really make sense in U-Boot's case, so we just change the
assumption from "aspm" to "none" (which is always safe).

This patch DOES resolve a real-world crash that occurs when U-Boot is
running on a Raspberry Pi CM4 installed in slot 3 of a Turing Pi 2
cluster board.

[1]: https://lore.kernel.org/all/20230428223500.23337-1-jim2101024@gmail.com/

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
</content>
</entry>
<entry>
<title>pci: pcie-brcmstb: bring over some robustness improvements from Linux</title>
<updated>2023-08-30T15:47:43Z</updated>
<author>
<name>Sam Edwards</name>
<email>cfsworks@gmail.com</email>
</author>
<published>2023-08-14T22:34:13Z</published>
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<id>urn:sha1:d709d4695fd3740025068cc9225755255875f6ad</id>
<content type='text'>
Since the initial U-Boot driver was ported here from Linux, the latter
has had a few changes for robustness/stability. This patch brings over
two of them:
- Do not attempt to access the configuration space of a PCIe device if
  the link has gone down, as that will result in an asynchronous SError
  interrupt which will crash U-Boot.
- Wait for the recommended 100ms after PERST# is deasserted.

I sent this patch while debugging a crash involving PCIe, but these
are unrelated improvements. I do not believe that this patch fixes any
real-world bug.

Signed-off-by: Sam Edwards &lt;CFSworks@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v2023.10-rc3' into next</title>
<updated>2023-08-21T21:32:17Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2023-08-21T21:32:17Z</published>
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<id>urn:sha1:7e6e40c572332b3835c5cb48a08e1d8d404c871c</id>
<content type='text'>
Prepare v2023.10-rc3

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>pci: ftpci100: add new driver implementation</title>
<updated>2023-08-14T21:55:53Z</updated>
<author>
<name>Sergei Antonov</name>
<email>saproj@gmail.com</email>
</author>
<published>2023-07-30T18:17:09Z</published>
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<id>urn:sha1:852467de92c38c6c5b9338dd75989e306461dd08</id>
<content type='text'>
Add a new DM driver supporting FTPCI100 IP used in SoC designs.
This implementation is not based on the old non-DM ftpci100 code
dropped from U-Boot.

Enable the driver in sandbox_defconfig to test compilability.

Signed-off-by: Sergei Antonov &lt;saproj@gmail.com&gt;
</content>
</entry>
<entry>
<title>pci: Fix device_find_first_child() return value handling</title>
<updated>2023-08-14T21:55:52Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2023-07-16T15:53:24Z</published>
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<id>urn:sha1:8ee830d8983763575aad62c37394ec954a76abc4</id>
<content type='text'>
This function only ever returns 0, but may not assign the second
parameter. Same thing for device_find_next_child(). Do not assign
ret to stop proliferation of this misuse.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>pci: apple: Enable CONFIG_SYS_PCI_64BIT</title>
<updated>2023-08-14T21:51:50Z</updated>
<author>
<name>Mark Kettenis</name>
<email>kettenis@openbsd.org</email>
</author>
<published>2023-07-14T19:15:16Z</published>
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<id>urn:sha1:815ce125a4a0a2f17ed5fee900b80954542b360c</id>
<content type='text'>
The Apple hardware supports 64-bit prefetchable memory windows so
enable CONFIG_SYS_PCI_64BIT. This fixes BAR assignments for the
Broadcom Ethernet controller used in some of the desktop machines.

Signed-off-by: Mark Kettenis &lt;kettenis@openbsd.org&gt;
</content>
</entry>
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