u-boot.git/drivers/pci, branch v2026.04

pci: pcie_cdns_ti: enable PCIe root-complex mode for J784S4 SoC

2026-03-09T15:35:43Z

The PCIe Controllers on the J784S4 SoC support Root-Complex mode of operation. Hence, enable it. Signed-off-by: Siddharth Vadapalli Fixes: 79f3e77133bd ("Subtree merge tag 'v6.16-dts' of dts repo [1] into dts/upstream")

Merge patch series "arm: k3: j722s: add PCIe support"

2026-02-04T16:40:37Z

George McCollister says: This patch series brings over several changes from Linux that are required to get PCIe working on the j722s and also enables PCIe in j722s_evm_a53_defconfig. This allows Linux to be booted from an NVMe drive. The J722S SoC provides pcie0 (using pcie_cdns_ti) thru serdes1 (using phy-cadence-torrent) thru serdes_wiz1 (using phy-j721e-wiz). Changes to the three drivers needed to be ported from Linux to enable the REFCLK output which is used with this SoC. These changes should be tested on other platforms using these drivers by those with the hardware available to make sure no problems were introduced. The PCIe controller in this SoC relies on the code performing the PCI scan not scanning devices which cannot exist. In Linux this is implemented as only_one_child() in probe.c. If this mechanism is not used, PCI config reads for subsequent functions will return information for device 0 resulting in U-Boot detecting 32 devices when only 1 is present. This change should be tested on other platforms with PCI to ensure the same PCI devices are enumerated before and after the patch is applied. I would like to thank Opto 22 for sponsoring the initial development and anyone that is able to contribute to testing of patches. Link: https://lore.kernel.org/r/20260130153856.2049575-1-george.mccollister@konsulko.com

pci: pcie_cdns_ti: Add PCIe support for J722S SoC

2026-02-04T16:40:28Z

TI's J722S SoC has one instance of PCIe namely PCIe0 which is a Gen3 single lane PCIe controller. Add support for the "ti,j722s-pcie-host" compatible specific to J722S SoC. Based on: https://lore.kernel.org/all/20240524092349.158443-1-s-vadapalli@ti.com/ Signed-off-by: George McCollister Tested-by: Bryan Brattlof

pci: pcie_cdns_ti: Add support to provide refclk to PCIe connector

2026-02-04T16:40:28Z

Add support to provide refclk to PCIe connector. Based on: https://lore.kernel.org/r/20210308063550.6227-5-kishon@ti.com Signed-off-by: George McCollister Tested-by: Bryan Brattlof

pci: skip unnecessary PCIe scanning

2026-02-04T16:40:28Z

Use the same mechanism as the Linux kernel to skip unnecessary (and in the case of the J722S, errant) scanning of direct children of root ports, downstream ports or bridges. Based on Linux PCI code in the following files as of b927546677c8: drivers/pci/probe.c drivers/pci/pci.h include/linux/pci.h Signed-off-by: George McCollister Tested-by: Bryan Brattlof

PCI: xilinx-nwl: Avoid crashing if configuring when the link is down

2026-01-12T09:33:27Z

The ECAM will return a slave error if we access non-root devices while the link is down. Add a check for this like Linux does so we don't crash. Fixes: 2f5ad77cfea ("PCI: zynqmp: Add ZynqMP NWL PCIe root port driver") Signed-off-by: Sean Anderson Reviewed-by: Stefan Roese Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/20260106220853.731358-1-sean.anderson@linux.dev

dm: core: Default to using DEVRES outside of xPL

2026-01-09T15:08:14Z

The devm alloc functions that we have may follow the Linux kernel model where allocations are (almost always) automatically free()'d. However, quite often we don't enable, in full U-Boot, the tracking and free()'ing functionality. This in turn leads to memory leaks because the driver author expects that since the functions have the same name as in the Linux Kernel they have the same behavior. In turn we then get functionally correct commits such as commit 00e1fed93c8c ("firmware: ti_sci: Fix memory leaks in devm_ti_sci_get_of_resource") that manually add these calls. Rather than manually tracking allocations and implementing free()s, rework things so that we follow expectations by enabling the DEVRES functionality (outside of xPL phases). This turns DEVRES from a prompted symbol to a symbol that must be select'd, and we now remove our non-managed alloc/free functions from outside of xPL builds. Reviewed-by: Michael Trimarchi Signed-off-by: Tom Rini

pci: pcie-rcar-gen4: Shut down controller on link down and remove

2025-10-17T19:53:52Z

In case the link is down, or the controller driver is removed before booting the next stage, shut down the PCIe link, put both the remote PCIe device and the controller into reset, and disable clock. This way, the hardware is not left active when not in use. Signed-off-by: Marek Vasut

pci: mvebu: Unable to assign mbus windows for 2nd pcie controller

2025-10-13T14:13:21Z

Correct the memory and IO mbus windows size increments in mvebu_pcie_bind. Currently, pcie1 controller resource_size(&mem) and resource_size(&io) checks result in a failure. This is because mem.end and io.end must be incremented at the end of pcie0 windows assignment. Signed-off-by: Tony Dinh Reviewed-by: Stefan Roese

pci: Remove pcie_intel_fpga driver

2025-10-08T19:54:58Z

This driver has never been enabled by a platform since introduction and does not currently compile. Remove it. Signed-off-by: Tom Rini