u-boot.git/drivers/pci_endpoint, branch v2026.01

pci_endpoint: pci_cdns_ti_ep: Enable PCIe Endpoint mode in J784S4 SoC

2025-11-07T22:08:49Z

TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and PCIe1 which are Cadence PCIe Controllers. Add support to configure PCIe instances in Endpoint mode of operation. While at it disable all endpoint functions except function 0 during probe to prevent the Root Complex from enumerating unconfigured functions. This ensures only properly configured endpoint functions are visible to the host and avoids enumeration issues with multi-function devices. Signed-off-by: Hrushikesh Salunke

pci_endpoint: pci_cdns_ti_ep: Add SERDES mux configuration support

2025-11-07T22:08:49Z

Probe the mux device early in the SERDES configuration flow to ensure proper lane routing before PHY initialization. This is required for SoCs where SERDES lanes can be muxed between different controllers (PCIe, USB, etc), and different mux configurations are required between different boot phases. Signed-off-by: Hrushikesh Salunke

pci_endpoint: pci_cdns_ti_ep: Add delay after power domain reset

2025-11-07T22:08:49Z

Add a 1ms delay after powering on the PCIe power domain to ensure the controller stabilizes before subsequent operations. This prevents potential timing issues during PCIe endpoint initialization. The delay allows sufficient time for the power domain to fully come up and the hardware to be in a stable state before configuration begins. Signed-off-by: Hrushikesh Salunke

pci_endpoint: pci_cdns_ti_ep: Fix the include path for header file

2025-07-08T22:19:31Z

The commit under fixes tag includes "pcie-cadence.h" using angle brackets. Since the header file is not in standard include path change it to double quotes to ensure proper inclusion and avoid build issues, especially on older compilers. Fixes: a4a0edc6046 ("pci_endpoint: Add TI K3 Cadence PCIe Endpoint Controller driver") Signed-off-by: Hrushikesh Salunke Reviewed-by: Bryan Brattlof

pci_endpoint: Add TI K3 Cadence PCIe Endpoint Controller driver

2025-06-26T23:16:40Z

Add support for Endpoint mode of operation in the Cadence PCIe Controller present on TI's K3 SoCs. This driver is an adaptation of the Linux kernel v6.15 driver (drivers/pci/controller/cadence/pci-j721e.c). Signed-off-by: Hrushikesh Salunke

Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"

2024-05-20T19:35:03Z

As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""

2024-05-19T14:16:36Z

When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman Signed-off-by: Tom Rini

pci_endpoint: Remove and add needed includes

2024-05-07T14:00:56Z

Remove from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini

global: Drop common.h inclusion

2023-12-21T13:54:37Z

In order to make it easier to move on to dropping common.h from code directly, remove common.h inclusion from the rest of the header file which had been including it. Reviewed-by: Simon Glass Signed-off-by: Tom Rini

dm: define LOG_CATEGORY for all uclass

2021-07-06T16:38:03Z

Define LOG_CATEGORY for all uclass to allow filtering with log command. Signed-off-by: Patrick Delaunay Reviewed-by: Simon Glass