u-boot.git/drivers/phy/Kconfig, branch v2021.01

Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic

2020-10-06T12:36:10Z

- generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver

phy: meson-gxl-usb: depend on Meson AXG aswell

2020-10-05T15:59:45Z

Enable build of meson-gxl-usb PHY for the AXG architecture aswell. Signed-off-by: Neil Armstrong

phy: add support for stingray PAXB PHY controller

2020-09-30T20:48:18Z

Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam Signed-off-by: Rayagonda Kokatanur Reviewed-by: Stefan Roese

phy: add driver for Qualcomm IPQ40xx USB PHY

2020-09-18T20:20:47Z

Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko Cc: Luka Perkov

phy: rockchip: Add Rockchip USB2PHY driver

2020-05-29T10:13:19Z

Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki Signed-off-by: Frank Wang Reviewed-by: Kever Yang

phy: meson: add GXBB PHY driver

2020-04-28T08:23:10Z

This adds support for the USB PHY found on Amlogic GXBB SoCs. Signed-off-by: Beniamino Galvani Reviewed-by: Neil Armstrong Signed-off-by: Neil Armstrong

phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 part

2019-10-25T15:20:44Z

This patch adds slew rate calibration for mt76x8-usb-phy, removes code which belongs to mt7620, and gets rid of using syscon and regmap by using clock driver and reset controller. Signed-off-by: Weijie Gao

phy: mediatek: add MediaTek T-PHY support for PCIe

2019-10-11T14:10:18Z

The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now we just enable PCIe. As for the other functionalities will be added gradually in upcoming days. This is adapted from the Linux version. Tested-by: Frank Wunderlich Signed-off-by: Ryder Lee Signed-off-by: Frank Wunderlich

Kconfig: Varios: Fix more SPL, TPL dependencies

2019-08-26T15:46:29Z

Several options are presenting themselves on a various boards where the options are clearly not used. (ie, SPL/TPL options when SPL or TPL are not defined) This patch is not attempting to be a complete list of items, but more like low hanging fruit. In some instances, I wasn't sure of DM was required, so I simply made them SPL or TPL. This patch attempts to reduce some of the menuconfig noise by defining dependencies so they don't appear when not used. Signed-off-by: Adam Ford

phy: add support for AM654x SERDES

2019-08-12T17:33:39Z

Add a new SERDES driver for TI's AM654x SoC which configures the SERDES only for PCIe. Support fo USB3 can be added later. SERDES in am654x has three input clocks (left input, external reference clock and right input) and two output clocks (left output and right output) in addition to a PLL mux clock which the SERDES uses for Clock Multiplier Unit (CMU refclock). The PLL mux clock can select from one of the three input clocks. The right output can select between left input and external reference clock while the left output can select between the right input and external reference clock. The driver has support to select PLL mux and left/right output mux as specified in device tree. Signed-off-by: Sekhar Nori