u-boot.git/drivers/phy/allwinner, branch v2020.01

sunxi: phy: Add USB PHY support for Allwinner H6

2019-07-16T11:43:15Z

The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual), which require a small addition to the USB PHY driver: In this case the second PHY is PHY3, not PHY1, so we need to skip number 1 and 2 in the code. Just use the respective code from Linux for that. Signed-off-by: Andre Przywara Tested-by: Corentin Labbe # Pine-H64 Reviewed-by: Jagan Teki

phy: sun4i-usb: Use CLK and RESET support

2019-01-18T16:49:09Z

Now clock and reset drivers are available for respective SoC's so use clk and reset ops on phy driver. Signed-off-by: Jagan Teki Acked-by: Maxime Ripard Reviewed-by: Marek Vasut

drivers: cosmetic: Convert SPDX license tags to Linux Kernel style

2018-10-28T13:26:39Z

Complete in the drivers directory the work started with commit 83d290c56fab ("SPDX: Convert all of our single license tags to Linux Kernel style"). Reviewed-by: Simon Glass Signed-off-by: Patrick Delaunay

phy: sun4i-usb: Update PHY#3 rst_mask only for H3_H5

2018-07-31T06:11:49Z

Only H3 and H5 have 4 PHYS so restrict rst_mask only for them by checking PHY id as 3 and update the proper bits. Signed-off-by: Jagan Teki Tested-by: Jagan Teki

phy: sun4i-usb: Remove usb_clk_cfg set in probe

2018-07-31T06:11:45Z

usb_clk_cfg is setting CTRL_PHYGATE bit value in probe which is BIT 0 for sun4i, 6i and 8 for a83t but all these were handling in phy ops init exit calls. Signed-off-by: Jagan Teki Tested-by: Jagan Teki

phy: sun4i-usb: Call phy_passby even for PHY#0

2018-07-31T06:11:41Z

On newer Allwinner SoC, there is a pair of EHCI/OHCI USB hosts for OTG host mode. USB PHY passby must be configured for its corresponding PHY. so we can call for PHY#0. on the other hand in past usb-phy code the same thing can be restricted for Lower SoC's, other than H3/H5/A64. Now there is no need to restrict usb passby since the phy driver is DT enabled, and the respective phy calls will trigger based DT information initiated by the drivers. Signed-off-by: Jagan Teki Tested-by: Jagan Teki

phy: sun4i-usb: Add a sunxi specific function for setting squelch-detect

2018-05-28T11:10:43Z

The sunxi otg phy has a bug where it wrongly detects a high speed squelch when reset on the root port gets de-asserted with a lo-speed device. The workaround for this is to disable squelch detect before de-asserting reset, and re-enabling it after the reset de-assert is done. Add a sunxi specific phy function to allow the sunxi-musb glue to do this. Signed-off-by: Jagan Teki Acked-by: Jun Nie

phy: sun4i-usb: Add A23 USB PHY config

2018-05-28T11:10:43Z

Allwinner A23 has 2 USB PHY's and 0x04 has phy ctrl offset. Signed-off-by: Jagan Teki Acked-by: Jun Nie

phy: sun4i-usb: Add A33 USB PHY config

2018-05-28T11:10:43Z

Allwinner A33 has 2 USB PHY's and 0x10 has phy ctrl offset. Signed-off-by: Jagan Teki Acked-by: Jun Nie

phy: sun4i-usb: Add A31 PHY config

2018-05-28T11:10:43Z

Allwinner A31 has 3 USB PHY's and rest similar to A10. Signed-off-by: Jagan Teki Acked-by: Jun Nie