u-boot.git/drivers/phy/allwinner, branch v2024.01

treewide: use dev_read_addr_*_ptr() where appropriate

2023-10-13T20:01:42Z

A follow-up to commit 842fb5de424e ("drivers: use devfdt_get_addr_size_index_ptr when cast to pointer") and commit 320a1938b6f7 ("drivers: use devfdt_get_addr_index_ptr when cast to pointer"). In addition to using the *_ptr variants of these functions where the address is cast to a pointer, this also changes devfdt_get_addr_*() to dev_read_addr_*() in a few places. Some variable and field types are changed from fdt_addr_t or phys_addr_t to void* where the cast was happening later. This patch fixes a number of compile warnings when building a 32bit U-Boot with CONFIG_PHYS_64BIT=y. In some places, it also fixes error handling where the return value of dev_read_addr() etc. was checked for NULL instead of FDT_ADDR_T_NONE. Signed-off-by: Matthias Schiffer Reviewed-by: Simon Glass

phy: sun4i: Add H616 USB PHY support

2023-07-20T23:28:13Z

Now that the Allwinner USB PHY driver supports the H616 quirk, let's enable support for USB ports on that SoC. We connect the compatible string to a new struct describing the SoCs USB PHY properties, and unblock the PHY driver selection in Kconfig. A later patch will enable USB support in the H616 boards' defconfigs. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

phy: sun4i-usb: Add H616 USB PHY quirk support

2023-07-20T23:28:13Z

The H616 USB PHY is some kind of special snowflake: Only port2 works out of the box, but all other ports need some help from this port2 to work correctly: The CLK_BUS_PHY2 and RST_USB_PHY2 clock and reset need to be enabled, and the SIDDQ bit in the PMU PHY control register needs to be cleared. For this register to be accessible, CLK_BUS_ECHI2 needs to be ungated. Don't ask .... Follow the respective Linux patch (b45c6d80325b) and add a quirk bit, triggering the special sequence as outlined above, for PHYs other than PHY2: ungate this one special clock, and clear the SIDDQ bit. We also pick the clock and reset from PHY2 and enable them as well. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

phy: sun4i-usb: Replace types with explicit quirk flags

2023-07-20T23:28:13Z

So far we were assigning some crude "type" (SoC name, really) to each Allwinner USB PHY model, then guarding certain quirks based on this. This does not only look weird, but gets more or more cumbersome to maintain. Remove the bogus type names altogether, instead introduce flags for each quirk, and explicitly check for them. This improves readability, and simplifies future extensions. Port of Linux patch 8dd256bae653. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

sunxi: Kconfig: rework PHY_USB_SUN4I selection

2023-07-20T23:26:36Z

At the moment we use "select" in each Allwinner SoC's Kconfig section to include the USB PHY driver in the build. This means it cannot be disabled via Kconfig, although USB is not really a strictly required core functionality, and a particular board might not even include USB ports. Rework the Kconfig part by removing the "select" lines for each SoC's section, and instead letting it default to "y" in the PHY driver section itself. We use "depends on !" to exclude the few SoCs we don't support (yet). The Allwinner V3s does not enable USB (PHY) support at the moment, even though it should work: let the PHY default to "n" to keep the current behaviour. Also the MUSB USB driver directly calls some functions from the PHY driver, so let the former depend on the PHY driver. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Tested-by: Sam Edwards

phy: sun4i-usb: add Allwinner F1C100s support

2023-07-20T23:21:42Z

The Allwinner F1C100s implements a single USB PHY, connected to its MUSB OTG controller. The USB PHY is of the simpler, older type (like the A10), the only real difference is that it's indeed only one PHY. Add a struct describing those F1C100s USB PHY properties, and connect it to the new compatible string. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

phy: sun4i-usb: Fix of_xlate() argument check

2023-07-20T23:21:42Z

In its of_xlate() function, the Allwinner USB PHY driver compares the args_count variable against the number of implemented USB PHYs, although this is the *number of arguments* to the DT phandle property. Per the DT binding for this PHY device, this number is always one, so this check will always fail if the particular SoC implements exactly one USB PHY. So far this affected only the V3s (which has USB support disabled), but the F1C100s also sports one PHY only. Fix that check to compare args_count against exactly 1, and the args[0] content (requested PHY number) against the number of implemented PHYs. This fixes USB operation on the Allwinner V3s and allows to enable USB on the Allwinner F1C100s SoC. Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec

drivers: use dev_read_addr_ptr when cast to pointer

2023-05-06T09:28:18Z

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU can expect 64-bit data from the device tree parser, so use dev_read_addr_ptr instead of the dev_read_addr function in the various files in the drivers directory that cast to a pointer. As we are there also streamline the error response to -EINVAL on return. Signed-off-by: Johan Jonker Reviewed-by: Simon Glass

phy: sun4i-usb: Do not drive VBUS with external VBUS present

2023-04-28T00:30:40Z

It is possible to use host-side USB with externally-provided VBUS. For example, some USB OTG cables have an extra power input which powers both the board and the USB peripheral. To support this setup, skip enabling the VBUS switch/regulator if VBUS voltage is already present. This behavior matches the Linux PHY driver. Signed-off-by: Samuel Holland Signed-off-by: Andre Przywara

phy: sun4i-usb: Add D1 variant

2022-07-18T22:48:37Z

D1 has a register layout like A100 and H616, with the moved SIDDQ bit. Unlike H616 it does not have any dependencies between PHY instances. Signed-off-by: Samuel Holland Reviewed-by: Jagan Teki Signed-off-by: Andre Przywara