<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/phy/rockchip, branch v2025.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/phy/rockchip?h=v2025.07</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/phy/rockchip?h=v2025.07'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2025-04-23T14:12:04Z</updated>
<entry>
<title>phy: rockchip-inno-usb2: Add support for RK3528</title>
<updated>2025-04-23T14:12:04Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-04-07T22:47:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b9cf58dacd69e3458832e4edc9de8baeb8e26ec2'/>
<id>urn:sha1:b9cf58dacd69e3458832e4edc9de8baeb8e26ec2</id>
<content type='text'>
Add support for the two USB2.0 PHYs use in the RK3528 SoC.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip-inno-usb2: Add support for clkout_ctl_phy</title>
<updated>2025-04-23T14:12:04Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-04-07T22:46:59Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=229218373c221d3ac093179f83ec1fdddcbd4dfe'/>
<id>urn:sha1:229218373c221d3ac093179f83ec1fdddcbd4dfe</id>
<content type='text'>
The 480m clk is controlled using regs in the PHY address space and not
in the USB GRF address space on e.g. RK3528 and RK3506.

Add a clkout_ctl_phy usb2phy_reg to handle enable/disable of the 480m
clk on these SoCs.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: naneng-combphy: Introduce PHY-IDs to fix RK3588 muxing</title>
<updated>2024-08-09T10:35:22Z</updated>
<author>
<name>Sebastian Kropatsch</name>
<email>seb-dev@mail.de</email>
</author>
<published>2024-07-23T21:13:14Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0cb1fddb743da8312be469920c17559bd2043f46'/>
<id>urn:sha1:0cb1fddb743da8312be469920c17559bd2043f46</id>
<content type='text'>
Fix multiplex configuration for PCIe1L0 and PCIe1L1 in PCIESEL_CON for
RK3588 to correctly select between Combo PHYs and PCIe3 PHY.
Currently, the code incorrectly muxes both ports to Combo PHYs,
interfering with PCIe3 PHY settings.
Introduce PHY identifiers to identify the correct Combo PHY and set
the necessary bits accordingly.

This fix is adapted from the upstream Linux commit by Sebastian Reichel:
d16d4002fea6 ("phy: rockchip: naneng-combphy: Fix mux on rk3588")

Fixes: b37260bca1aa ("phy: rockchip: naneng-combphy: Use signal from comb PHY on RK3588")
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Signed-off-by: Sebastian Kropatsch &lt;seb-dev@mail.de&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: snps-pcie3: Fix clearing PHP_GRF_PCIESEL_CON bits</title>
<updated>2024-07-17T06:48:18Z</updated>
<author>
<name>Sebastian Kropatsch</name>
<email>seb-dev@mail.de</email>
</author>
<published>2024-07-14T21:23:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=9a48ec3e91c6fbdb8d67dfd80488def8fa61b681'/>
<id>urn:sha1:9a48ec3e91c6fbdb8d67dfd80488def8fa61b681</id>
<content type='text'>
The pcie1ln_sel bits for the RK3588 are getting set but not cleared due
to an incorrect write mask.
Use a newly introduced constant for the write mask to fix this.
Also introduce a GENMASK-based constant for PCIE30_PHY_MODE.

This fix is adapted from the upstream Linux commit by Sebastian Reichel:
55491a5fa163 ("phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits")

Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588")
Signed-off-by: Sebastian Kropatsch &lt;seb-dev@mail.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: snps-pcie3: Fix bifurcation for RK3588</title>
<updated>2024-07-17T06:48:18Z</updated>
<author>
<name>Sebastian Kropatsch</name>
<email>seb-dev@mail.de</email>
</author>
<published>2024-07-14T21:23:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ee84a18b3d7fd5aca41f06765fe8027519b2e176'/>
<id>urn:sha1:ee84a18b3d7fd5aca41f06765fe8027519b2e176</id>
<content type='text'>
Misconfigured `PHP_GRF_PCIESEL` values are causing bifurcation issues,
for example on the FriendlyElec CM3588 NAS board which uses bifurcation
on both PCIe PCIe ports (all four lanes) to enable four M.2 NVMe
sockets. Without this fix, NVMe devices do not get recognized.

Correct the `PHP_GRF_PCIESEL` register configuration and simplify the
bifurcation logic, enabling proper PCIe bifurcation based on the
data-lanes property.

This fix is adapted from the upstream Linux commit by Michal Tomek:
f8020dfb311d ("phy: rockchip-snps-pcie3: fix bifurcation on rk3588")

Fixes: 50e54e80679b ("phy: rockchip: snps-pcie3: Add support for RK3588")
Signed-off-by: Sebastian Kropatsch &lt;seb-dev@mail.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: snps-pcie3: Fix "rockchip" spelling</title>
<updated>2024-07-17T06:48:18Z</updated>
<author>
<name>Sebastian Kropatsch</name>
<email>seb-dev@mail.de</email>
</author>
<published>2024-07-14T21:23:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b962b490b74ff195daa7fbc030bc8ed60ebc082b'/>
<id>urn:sha1:b962b490b74ff195daa7fbc030bc8ed60ebc082b</id>
<content type='text'>
Several identifiers use "rochchip" instead of "rockchip".
Fix this by replacing every instance of "rochchip" with "rockchip".

Signed-off-by: Sebastian Kropatsch &lt;seb-dev@mail.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: naneng-combphy: Fix "rockchip" spelling</title>
<updated>2024-07-17T06:48:18Z</updated>
<author>
<name>Sebastian Kropatsch</name>
<email>seb-dev@mail.de</email>
</author>
<published>2024-07-14T21:23:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f9cbd2d7b606ab286ed3a7ae5ca7ec767454ecfb'/>
<id>urn:sha1:f9cbd2d7b606ab286ed3a7ae5ca7ec767454ecfb</id>
<content type='text'>
Replace "rochchip" by "rockchip" in two instances.

Signed-off-by: Sebastian Kropatsch &lt;seb-dev@mail.de&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>phy: rockchip: inno-hdmi: Fix missing readl base addr</title>
<updated>2024-07-17T06:48:18Z</updated>
<author>
<name>Jagan Teki</name>
<email>jagan@edgeble.ai</email>
</author>
<published>2024-06-22T18:21:49Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=35214b99eb7b1a929616d79fd2ac6457c3738f8b'/>
<id>urn:sha1:35214b99eb7b1a929616d79fd2ac6457c3738f8b</id>
<content type='text'>
inno_poll passes the reg offset that is used by readl_poll_sleep_timeout
without any base addr.

Fix it.

Bug:
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)
inno_hdmi_phy phy@ff430000: Pre-PLL locking failed
inno_hdmi_phy phy@ff430000: PHY: Failed to power on phy@ff430000: -110.
failed to power on phy (ret=-110)

Fixes: aa2271184603 ("phy: rockchip: Add Rockchip INNO HDMI PHY driver")
Suggested-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Jagan Teki &lt;jagan@edgeble.ai&gt;
Reviewed-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
</content>
</entry>
<entry>
<title>Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"</title>
<updated>2024-05-20T19:35:03Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-20T19:35:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=03de305ec48b0bb28554372abb40ccd46dbe0bf9'/>
<id>urn:sha1:03de305ec48b0bb28554372abb40ccd46dbe0bf9</id>
<content type='text'>
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet""</title>
<updated>2024-05-19T14:16:36Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-05-19T02:20:43Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d678a59d2d719da9e807495b4b021501f2836ca5'/>
<id>urn:sha1:d678a59d2d719da9e807495b4b021501f2836ca5</id>
<content type='text'>
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
</feed>
