<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/phy/socionext/Makefile, branch master</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>phy: socionext: Add UniPhier USB3 PHY driver</title>
<updated>2023-02-22T18:40:11+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2023-02-20T05:50:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7a888de4b51803657f448139d9fbe457f4678c4f'/>
<id>7a888de4b51803657f448139d9fbe457f4678c4f</id>
<content type='text'>
Add USB3 PHY driver support to control clocks and resets needed to enable
PHY. The phy_ops-&gt;init() and exit() control PHY clocks and resets only,
and clocks and resets for the controller and the parent logic are enabled
in advance.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add USB3 PHY driver support to control clocks and resets needed to enable
PHY. The phy_ops-&gt;init() and exit() control PHY clocks and resets only,
and clocks and resets for the controller and the parent logic are enabled
in advance.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Reviewed-by: Marek Vasut &lt;marex@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: socionext: Add UniPhier PCIe PHY driver</title>
<updated>2021-07-14T20:48:07+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-07-06T10:01:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b0415d826fce8e04d0c2f09876a479301ccb6405'/>
<id>b0415d826fce8e04d0c2f09876a479301ccb6405</id>
<content type='text'>
Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add PCIe PHY driver support for Pro5, LD20 and PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
