u-boot.git/drivers/phy, branch v2019.10

Kconfig: Varios: Fix more SPL, TPL dependencies

2019-08-26T15:46:29+00:00

Several options are presenting themselves on a various boards
where the options are clearly not used.  (ie, SPL/TPL options
when SPL or TPL are not defined)

This patch is not attempting to be a complete list of items, but
more like low hanging fruit.  In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.

This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.

Signed-off-by: Adam Ford

phy: add support for AM654x SERDES

2019-08-12T17:33:39+00:00

Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.

SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).

The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.

The driver has support to select PLL mux and left/right output
mux as specified in device tree.

Signed-off-by: Sekhar Nori

phy: Add support for phy-da8xx-usb

2019-08-08T09:35:02+00:00

In preparation for supporting the musb driver, this patch
adds support for the usb phy associated with the musb driver.

Signed-off-by: Adam Ford

sunxi: phy: Add USB PHY support for Allwinner H6

2019-07-16T11:43:15+00:00

The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.

Signed-off-by: Andre Przywara 
Tested-by: Corentin Labbe  # Pine-H64
Reviewed-by: Jagan Teki

phy: meson: add Amlogic G12A USB2 and USB3+PCIE PHY drivers

2019-05-09T08:38:32+00:00

This adds support for the USB PHYs found in the Amlogic G12A SoC Family.

The USB2 PHY supports Host and/or Peripheral mode, depending on it's position.
The first PHY is only used as Host, but the second supports Dual modes
defined by the USB Control Glue HW in front of the USB Controllers.

The second driver supports USB3 Host mode or PCIE 2.0 mode, depending on
the layout of the board.
Selection is done by the #phy-cells, making the mode static and exclusive.

Signed-off-by: Neil Armstrong

phy: usbphyc: increase PLL wait timeout

2019-04-21T08:26:51+00:00

wait 200us to solve USB init issue on device mode
(ums and stm32prog commands)

Signed-off-by: Patrick Delaunay

phy: usbphyc: move vdda1v1 and vdda1v8 in phy_init

2019-04-21T08:26:51+00:00

vdda1v1 and vdda1v8 are used by the PLL.
Both need to be enabled before starting the PLL.

Signed-off-by: Patrick Delaunay

phy: usbphyc: Binding update of vdda supply

2019-04-21T08:26:51+00:00

Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port

Signed-off-by: Patrick Delaunay

phy: usbphyc: update xlate with DT binding

2019-04-21T08:26:51+00:00

Parameter added for port 1, for example:

&usbh_ehci {
	phys = <&usbphyc_port0>;
	phy-names = "usb";
	vbus-supply = <&vbus_sw>;
	status = "okay";
};

&usbotg_hs {
	pinctrl-names = "default";
	pinctrl-0 = <&usbotg_hs_pins_a>;
	phys = <&usbphyc_port1 0>;
	phy-names = "usb2-phy";
	status = "okay";
};

Signed-off-by: Patrick Delaunay

phy: usbphyc: remove unused variable index

2019-04-21T08:26:51+00:00

Remove unused field index in struct stm32_usbphyc_phy.

Signed-off-by: Patrick Delaunay