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<title>u-boot.git/drivers/phy, branch v2021.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
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<entry>
<title>phy: marvell: cp110: update mode parameter for pcie power on calls</title>
<updated>2020-10-29T07:00:12+00:00</updated>
<author>
<name>Igal Liberman</name>
<email>igall@marvell.com</email>
</author>
<published>2020-10-18T14:11:13+00:00</published>
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<id>3261f6d390f84f38e504eeed9cd2453df932ef24</id>
<content type='text'>
It helps ATF to determine who called power on function (U-boot/Linux).

The corresponding ATF code was added in this commit:

  mvebu: cp110: avoid pcie power on/off sequence when called from Linux
  https://github.com/ARM-software/arm-trusted-firmware/commit/55df84f974ea37abbb4f93f000f101f70cda5303

Signed-off-by: Igal Liberman &lt;igall@marvell.com&gt;
Reviewed-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
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<pre>
It helps ATF to determine who called power on function (U-boot/Linux).

The corresponding ATF code was added in this commit:

  mvebu: cp110: avoid pcie power on/off sequence when called from Linux
  https://github.com/ARM-software/arm-trusted-firmware/commit/55df84f974ea37abbb4f93f000f101f70cda5303

Signed-off-by: Igal Liberman &lt;igall@marvell.com&gt;
Reviewed-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
</pre>
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</content>
</entry>
<entry>
<title>phy: marvell: cp110: let the firmware configure comphy for PCIe</title>
<updated>2020-10-29T07:00:12+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2020-10-18T14:11:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0a1a1642aa6674777b8a3ea593c915d742a47dc4'/>
<id>0a1a1642aa6674777b8a3ea593c915d742a47dc4</id>
<content type='text'>
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Reviewed-by: Igal Liberman &lt;igall@marvell.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
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<pre>
Replace the comphy initialization for PCIe with appropriate SMC call, so
the firmware will perform appropriate comphy initialization.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Signed-off-by: Ken Ma &lt;make@marvell.com&gt;
Reviewed-by: Igal Liberman &lt;igall@marvell.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: marvell: cp110: let the firmware configure the comphy</title>
<updated>2020-10-29T07:00:12+00:00</updated>
<author>
<name>Grzegorz Jaszczyk</name>
<email>jaz@semihalf.com</email>
</author>
<published>2020-10-18T14:11:11+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b24bb99df10542bd4ec3cfa310e28b4544fbc847'/>
<id>b24bb99df10542bd4ec3cfa310e28b4544fbc847</id>
<content type='text'>
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.

This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Reviewed-by: Igal Liberman &lt;igall@marvell.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
</content>
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<pre>
Replace all comphy initialization with appropriate smc calls. It will
result with triggering synchronous exception that is handled by Secure
Monitor code in EL3. Then the Secure Monitor code will dispatch each smc
call (by parsing the smc function identifier) and triggers appropriate
comphy initialization.

This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI
interfaces.

Signed-off-by: Grzegorz Jaszczyk &lt;jaz@semihalf.com&gt;
Reviewed-by: Igal Liberman &lt;igall@marvell.com&gt;
Signed-off-by: Baruch Siach &lt;baruch@tkos.co.il&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: nop-phy: add clk bulk</title>
<updated>2020-10-23T20:38:31+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2020-10-15T10:05:58+00:00</published>
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<id>62ee9576c678cfa3f769987f0177c3ec30a924ab</id>
<content type='text'>
Add clk bulk for nop-phy driver.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
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<pre>
Add clk bulk for nop-phy driver.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: Include device_compat.h</title>
<updated>2020-10-15T22:36:56+00:00</updated>
<author>
<name>Sean Anderson</name>
<email>seanga2@gmail.com</email>
</author>
<published>2020-10-05T01:39:47+00:00</published>
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<id>bdc1fdf6fc5cbcffa669e1a374fb17685e58eeba</id>
<content type='text'>
Necessary for dev_xxx.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
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<pre>
Necessary for dev_xxx.

Signed-off-by: Sean Anderson &lt;seanga2@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'ti-v2021.01-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti</title>
<updated>2020-10-12T11:26:57+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-10-12T11:26:57+00:00</published>
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<id>47e9c70421d75336336097c1425028b40e4f0b54</id>
<content type='text'>
- Minor cleanup on K3 env variables
- Fix OSPI compatible for J721e
- Drop unused property in omap-usb2-phy
- Update Maintainer for am335x-guardian board.
</content>
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<pre>
- Minor cleanup on K3 env variables
- Fix OSPI compatible for J721e
- Drop unused property in omap-usb2-phy
- Update Maintainer for am335x-guardian board.
</pre>
</div>
</content>
</entry>
<entry>
<title>phy: omap-usb2-phy: Drop usage of "ti, dis-chg-det-quirk" DT property</title>
<updated>2020-10-12T02:41:11+00:00</updated>
<author>
<name>Vignesh Raghavendra</name>
<email>vigneshr@ti.com</email>
</author>
<published>2020-10-08T09:28:38+00:00</published>
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<id>555ee3949307648d6c40081b30e212af075ab8a8</id>
<content type='text'>
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation.  Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</content>
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<pre>
"ti,dis-chg-det-quirk" property is not part of Linux kernel DT binding
documentation.  Therefore drop this and instead use soc_device_match()
to distinguish b/w AM654 SR1.0 and SR2.0 devices similar to Linux kernel
driver.

Signed-off-by: Vignesh Raghavendra &lt;vigneshr@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'dm-pull-6oct20' of git://git.denx.de/u-boot-dm</title>
<updated>2020-10-06T17:59:01+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-10-06T17:59:01+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=42378e3cd2432e0353cdcc1789039293e4b46252'/>
<id>42378e3cd2432e0353cdcc1789039293e4b46252</id>
<content type='text'>
bloblist enhancement for alignment
Update ofnode/dev_read phandle function
sandbox keyboard enhancements and fixes
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<pre>
bloblist enhancement for alignment
Update ofnode/dev_read phandle function
sandbox keyboard enhancements and fixes
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: add cells_count parameter in *_count_phandle_with_args</title>
<updated>2020-10-06T15:07:54+00:00</updated>
<author>
<name>Patrick Delaunay</name>
<email>patrick.delaunay@st.com</email>
</author>
<published>2020-09-25T07:41:14+00:00</published>
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<id>89f68302cacaa41330959420d7329b7c89afdd88</id>
<content type='text'>
The cell_count argument is required when cells_name is NULL.

This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args

This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.

For example:
  count = dev_count_phandle_with_args(dev, "array", NULL, 3);

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
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<pre>
The cell_count argument is required when cells_name is NULL.

This patch adds this parameter in live tree API
- of_count_phandle_with_args
- ofnode_count_phandle_with_args
- dev_count_phandle_with_args

This parameter solves issue when these API is used to count
the number of element of a cell without cell name. This parameter
allow to force the size cell.

For example:
  count = dev_count_phandle_with_args(dev, "array", NULL, 3);

Signed-off-by: Patrick Delaunay &lt;patrick.delaunay@st.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge tag 'u-boot-amlogic-20201005' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic</title>
<updated>2020-10-06T12:36:10+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2020-10-06T12:36:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=987ab49366f3fcd25039eab431bf099b587b3265'/>
<id>987ab49366f3fcd25039eab431bf099b587b3265</id>
<content type='text'>
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
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<pre>
- generate unique mac address from SoC serial on S400 board
- Add USB support for GXL and AXG SoCs
- Update Gadget code to use the new GXL and AXG USB glue driver
- Add a VIM3 board support to add dynamic PCIe enable in OS DT
- Fix AXG pinmux with requesting GPIOs
- Add missing GPIOA_18 for AXG pinctrl
- Add Amlogic PWM driver
</pre>
</div>
</content>
</entry>
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